soc/intel/fsp_broadwell_de: Drop support

Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are
now mandatory features, which this platform lacks.

Change-Id: I8b6502b0894f9e2b8b1334871d7b6cde65cba7d4
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36984
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>

1 files changed, 0 insertions, 28 deletions

diff --git a/src/soc/intel/fsp_broadwell_de/tsc_freq.c b/src/soc/intel/fsp_broadwell_de/tsc_freq.c
deleted file mode 100644
index 4225a3ab22..0000000000
--- a/src/soc/intel/fsp_broadwell_de/tsc_freq.c
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <stdint.h>
-#include <cpu/x86/msr.h>
-#include <cpu/x86/tsc.h>
-#include <soc/msr.h>
-#include <soc/broadwell_de.h>
-
-unsigned long tsc_freq_mhz(void)
-{
-	msr_t platform_info;
-
-	platform_info = rdmsr(MSR_PLATFORM_INFO);
-	return CPU_BCLK * ((platform_info.lo >> 8) & 0xff);
-}