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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-14 05:41:41 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-15 06:55:59 +0000 |
commit | faf20d30a6e451d45e29613e3f4603dc72771843 (patch) | |
tree | d1c3df6e87473d66633fb3a4a8cec736fdda2cd7 /src/soc/intel/fsp_broadwell_de/cpu.c | |
parent | f091f4daf7e76cff3cdf9b7a19bb77281fb6af9d (diff) |
soc/intel: Rename some SMM support functions
Rename southbridge_smm_X to smm_southbridge_X.
Rename most southcluster_smm_X to smm_southbridge_X.
Change-Id: I4f6f9207ba32cf51d75b9ca9230e38310a33a311
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34856
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/fsp_broadwell_de/cpu.c')
-rw-r--r-- | src/soc/intel/fsp_broadwell_de/cpu.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/fsp_broadwell_de/cpu.c b/src/soc/intel/fsp_broadwell_de/cpu.c index 0b933c5db7..db33f2eb6b 100644 --- a/src/soc/intel/fsp_broadwell_de/cpu.c +++ b/src/soc/intel/fsp_broadwell_de/cpu.c @@ -19,6 +19,7 @@ #include <console/console.h> #include <cpu/cpu.h> #include <cpu/intel/microcode.h> +#include <cpu/intel/smm_reloc.h> #include <cpu/x86/cache.h> #include <cpu/x86/lapic.h> #include <cpu/x86/mp.h> @@ -99,7 +100,7 @@ static void post_mp_init(void) set_max_ratio(); /* Now that all APs have been relocated as well as the BSP let SMIs start flowing. */ - southbridge_smm_enable_smi(); + smm_southbridge_enable_smi(); /* Set SMI lock bits. */ smm_lock(); |