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authorArthur Heymans <arthur@aheymans.xyz>2019-11-19 18:50:20 +0100
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-11-21 06:43:29 +0000
commitf67c81fc7030e278cf3dbc906f9ba5e265d843f0 (patch)
treec89f4856690b80e8aa3c53a51ff2e4dfd553c84f /src/soc/intel/fsp_broadwell_de/acpi
parent433471244b7313dde6bb07d58943bfd0d9957c59 (diff)
soc/intel/fsp_broadwell_de: Drop support
Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are now mandatory features, which this platform lacks. Change-Id: I8b6502b0894f9e2b8b1334871d7b6cde65cba7d4 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36984 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/soc/intel/fsp_broadwell_de/acpi')
-rw-r--r--src/soc/intel/fsp_broadwell_de/acpi/irqlinks.asl464
-rw-r--r--src/soc/intel/fsp_broadwell_de/acpi/lpc.asl92
-rw-r--r--src/soc/intel/fsp_broadwell_de/acpi/pcie1.asl465
-rw-r--r--src/soc/intel/fsp_broadwell_de/acpi/southcluster.asl349
-rw-r--r--src/soc/intel/fsp_broadwell_de/acpi/uncore.asl267
5 files changed, 0 insertions, 1637 deletions
diff --git a/src/soc/intel/fsp_broadwell_de/acpi/irqlinks.asl b/src/soc/intel/fsp_broadwell_de/acpi/irqlinks.asl
deleted file mode 100644
index 7d02eb0437..0000000000
--- a/src/soc/intel/fsp_broadwell_de/acpi/irqlinks.asl
+++ /dev/null
@@ -1,464 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-OperationRegion (PRR0, PCI_Config, 0x00, 0x100)
-Field (PRR0, AnyAcc, NoLock, Preserve) {
- Offset(0x60),
- PIRA, 8,
- PIRB, 8,
- PIRC, 8,
- PIRD, 8,
- Offset(0x68),
- PIRE, 8,
- PIRF, 8,
- PIRG, 8,
- PIRH, 8
-}
-
-Device (LNKA) { // PCI IRQ link A
- Name (_HID,EISAID("PNP0C0F"))
- //Name(_UID, 1)
- Method (_STA,0,NotSerialized) {
- If(And(PIRA, 0x80)) {
- Return (0x9)
- } Else {
- Return (0xB)
- } // Don't display
- }
-
- Method (_DIS,0,NotSerialized) {
- Or (PIRA, 0x80, PIRA)
- }
-
- Method (_CRS,0,Serialized) {
- Name (BUF0, ResourceTemplate() {IRQ(Level,ActiveLow,Shared){0}})
- //
- // Define references to buffer elements
- //
- CreateWordField (BUF0, 0x01, IRQW) // IRQ low
- //
- // Write current settings into IRQ descriptor
- //
- If (And(PIRA, 0x80)) {
- Store (Zero, Local0)
- } Else {
- Store (One,Local0)
- }
- //
- // Shift 1 by value in register 70, Save in buffer
- //
- ShiftLeft (Local0,And (PIRA,0x0F),IRQW) // Save in buffer
- Return (BUF0) // Return Buf0
- } // End of _CRS method
-
- Name (_PRS, ResourceTemplate()
- {IRQ(Level,ActiveLow,Shared){3,4,5,6,7,9,10,11,12,14,15}})
-
- Method (_SRS,1,NotSerialized) {
- CreateWordField (ARG0, 0x01, IRQW) // IRQ low
-
- FindSetRightBit(IRQW,Local0) // Set IRQ
- If (LNotEqual (IRQW,Zero)){
- And (Local0, 0x7F,Local0)
- Decrement (Local0)
- } Else {
- Or (Local0, 0x80,Local0)
- }
- Store (Local0, PIRA)
- } // End of _SRS Method
-}
-
-Device(LNKB) { // PCI IRQ link B
- Name (_HID,EISAID("PNP0C0F"))
- //Name(_UID, 2)
- Method (_STA,0,NotSerialized) {
- If (And (PIRB, 0x80)) {
- Return (0x9)
- } Else {
- Return (0xB)
- } // Don't display
- }
-
- Method (_DIS,0,NotSerialized) {
- Or (PIRB, 0x80,PIRB)
- }
-
- Method (_CRS,0,Serialized) {
- Name(BUF0, ResourceTemplate()
- {IRQ(Level,ActiveLow,Shared){0}})
- //
- // Define references to buffer elements
- //
- CreateWordField (BUF0, 0x01, IRQW) // IRQ low
- //
- // Write current settings into IRQ descriptor
- //
- If (And (PIRB, 0x80)) {
- Store (Zero, Local0)
- } Else {
- Store (One,Local0)
- }
- //
- // Shift 1 by value in register 70, Save in buffer
- //
- ShiftLeft (Local0,And (PIRB,0x0F),IRQW) // Save in buffer
- Return (BUF0) // Return Buf0
- } // End of _CRS method
-
- Name (_PRS,
- ResourceTemplate()
- {IRQ(Level,ActiveLow,Shared){3,4,5,6,7,9,10,11,12,14,15}})
-
- Method (_SRS,1,NotSerialized) {
- CreateWordField (ARG0, 0x01, IRQW) // IRQ low
-
- FindSetRightBit(IRQW,Local0) // Set IRQ
- If (LNotEqual(IRQW,Zero)) {
- And (Local0, 0x7F, Local0)
- Decrement (Local0)
- } Else {
- Or (Local0, 0x80, Local0)
- }
- Store (Local0, PIRB)
- } // End of _SRS Method
-}
-
-Device(LNKC) { // PCI IRQ link C
- Name(_HID, EISAID("PNP0C0F"))
- //Name(_UID, 3)
-
- Method (_STA,0,NotSerialized) {
- If (And (PIRC, 0x80)) {
- Return (0x9)
- } Else {
- Return (0xB)
- } // Don't display
- }
-
- Method (_DIS, 0, NotSerialized) {
- Or (PIRC, 0x80, PIRC)
- }
-
- Method (_CRS, 0, Serialized) {
- Name (BUF0, ResourceTemplate()
- {IRQ(Level,ActiveLow,Shared){0}})
- //
- // Define references to buffer elements
- //
- CreateWordField (BUF0, 0x01, IRQW) // IRQ low
- //
- // Write current settings into IRQ descriptor
- //
- If (And (PIRC, 0x80)) {
- Store (Zero, Local0)
- } Else {
- Store (One,Local0)
- }
- //
- // Shift 1 by value in register 70, Save in buffer
- //
- ShiftLeft (Local0,And (PIRC,0x0F),IRQW)
- Return (BUF0)
- } // End of _CRS method
-
- Name (_PRS, ResourceTemplate()
- {IRQ(Level,ActiveLow,Shared){3,4,5,6,7,9,10,11,12,14,15}})
-
- Method (_SRS,1,NotSerialized) {
- CreateWordField (ARG0, 0x01, IRQW) // IRQ low
- FindSetRightBit(IRQW,Local0) // Set IRQ
- If (LNotEqual (IRQW,Zero)) {
- And (Local0, 0x7F, Local0)
- Decrement (Local0)
- } Else {
- Or (Local0, 0x80,Local0)
- }
- Store (Local0, PIRC)
- } // End of _SRS Method
-}
-
-Device (LNKD) { // PCI IRQ link D
- Name (_HID,EISAID ("PNP0C0F"))
-
- //Name(_UID, 4)
-
- Method (_STA, 0, NotSerialized) {
- If (And (PIRD, 0x80)) {
- Return (0x9)
- } Else {
- Return (0xB)
- } // Don't display
- }
-
- Method (_DIS, 0, NotSerialized) {
- Or(PIRD, 0x80,PIRD)
- }
-
- Method (_CRS,0,Serialized) {
- Name (BUF0, ResourceTemplate()
- {IRQ(Level,ActiveLow,Shared){0}})
- //
- // Define references to buffer elements
- //
- CreateWordField (BUF0, 0x01, IRQW) // IRQ low
- //
- // Write current settings into IRQ descriptor
- //
- If (And (PIRD, 0x80)) {
- Store (Zero, Local0)
- } Else {
- Store (One,Local0)
- }
- //
- // Shift 1 by value in register 70, Save in buffer
- //
- ShiftLeft (Local0, And (PIRD,0x0F), IRQW)
- Return (BUF0) // Return Buf0
- } // End of _CRS method
-
- Name (_PRS, ResourceTemplate()
- {IRQ(Level,ActiveLow,Shared){3,4,5,6,7,9,10,11,12,14,15}})
-
- Method (_SRS,1,NotSerialized) {
- CreateWordField (ARG0, 0x01, IRQW) // IRQ low
- FindSetRightBit (IRQW, Local0)// Set IRQ
- If (LNotEqual (IRQW, Zero)) {
- And (Local0, 0x7F, Local0)
- Decrement (Local0)
- } Else {
- Or (Local0, 0x80, Local0)
- }
- Store(Local0, PIRD)
- } // End of _SRS Method
-}
-
-Device(LNKE) { // PCI IRQ link E
- Name(_HID,EISAID("PNP0C0F"))
-
- //Name(_UID, 5)
-
- Method (_STA,0,NotSerialized) {
- If (And (PIRE, 0x80)) {
- Return(0x9)
- } Else {
- Return(0xB)
- } // Don't display
- }
-
- Method (_DIS,0,NotSerialized) {
- Or (PIRE, 0x80, PIRE)
- }
-
- Method (_CRS, 0, Serialized) {
- Name (BUF0, ResourceTemplate()
- {IRQ(Level,ActiveLow,Shared){0}})
- //
- // Define references to buffer elements
- //
- CreateWordField (BUF0, 0x01, IRQW) // IRQ low
- //
- // Write current settings into IRQ descriptor
- //
- If (And (PIRE, 0x80)) {
- Store (Zero, Local0)
- } Else {
- Store (One, Local0)
- }
- //
- // Shift 1 by value in register 70, Save in buffer
- //
- ShiftLeft (Local0, And (PIRE,0x0F), IRQW)
- Return (BUF0) // Return Buf0
- } // End of _CRS method
-
- Name(_PRS, ResourceTemplate()
- {IRQ(Level,ActiveLow,Shared){3,4,5,6,7,9,10,11,12,14,15}})
-
- Method (_SRS,1,NotSerialized) {
- CreateWordField (ARG0, 0x01, IRQW) // IRQ low
- FindSetRightBit (IRQW, Local0) // Set IRQ
- If (LNotEqual (IRQW, Zero)) {
- And (Local0, 0x7F, Local0)
- Decrement (Local0)
- } Else {
- Or (Local0, 0x80, Local0)
- }
- Store (Local0, PIRE)
- } // End of _SRS Method
-}
-
-Device(LNKF) { // PCI IRQ link F
- Name (_HID,EISAID("PNP0C0F"))
-
- //Name(_UID, 6)
-
- Method (_STA,0,NotSerialized) {
- If (And (PIRF, 0x80)) {
- Return (0x9)
- } Else {
- Return (0xB)
- } // Don't display
- }
-
- Method (_DIS,0,NotSerialized) {
- Or (PIRB, 0x80, PIRF)
- }
-
- Method (_CRS,0,Serialized) {
- Name(BUF0, ResourceTemplate()
- {IRQ(Level,ActiveLow,Shared){0}})
- //
- // Define references to buffer elements
- //
- CreateWordField (BUF0, 0x01, IRQW) // IRQ low
- //
- // Write current settings into IRQ descriptor
- //
- If (And (PIRF, 0x80)) {
- Store (Zero, Local0)
- } Else {
- Store (One, Local0)
- }
- //
- // Shift 1 by value in register 70, Save in buffer
- //
- ShiftLeft (Local0, And (PIRF, 0x0F),IRQW)
- Return (BUF0)
- } // End of _CRS method
-
- Name(_PRS, ResourceTemplate()
- {IRQ(Level,ActiveLow,Shared){3,4,5,6,7,9,10,11,12,14,15}})
-
- Method (_SRS,1,NotSerialized) {
- CreateWordField (ARG0, 0x01, IRQW) // IRQ low
- FindSetRightBit (IRQW,Local0) // Set IRQ
- If (LNotEqual (IRQW,Zero)) {
- And (Local0, 0x7F,Local0)
- Decrement (Local0)
- } Else {
- Or (Local0, 0x80, Local0)
- }
- Store (Local0, PIRF)
- } // End of _SRS Method
-}
-
-Device(LNKG) { // PCI IRQ link G
- Name(_HID,EISAID("PNP0C0F"))
- //Name(_UID, 7)
- Method(_STA,0,NotSerialized) {
- If (And (PIRG, 0x80)) {
- Return (0x9)
- } Else {
- Return (0xB)
- } // Don't display
- }
-
- Method (_DIS, 0, NotSerialized) {
- Or(PIRG, 0x80,PIRG)
- }
-
- Method (_CRS,0,Serialized){
- Name(BUF0,ResourceTemplate()
- {IRQ(Level,ActiveLow,Shared){0}})
- //
- // Define references to buffer elements
- //
- CreateWordField (BUF0, 0x01, IRQW) // IRQ low
- //
- // Write current settings into IRQ descriptor
- //
- If (And(PIRG, 0x80)) {
- Store(Zero, Local0)
- } Else {
- Store(One,Local0)
- }
- //
- // Shift 1 by value in register 70, Save in buffer
- //
- ShiftLeft (Local0,And(PIRG,0x0F),IRQW)
- Return (BUF0)
- } // End of _CRS method
-
- Name (_PRS, ResourceTemplate()
- {IRQ(Level,ActiveLow,Shared){3,4,5,6,7,9,10,11,12,14,15}})
-
- Method (_SRS,1,NotSerialized) {
- CreateWordField (ARG0, 0x01, IRQW) // IRQ low
- FindSetRightBit(IRQW,Local0) // Set IRQ
- If (LNotEqual (IRQW,Zero)) {
- And (Local0, 0x7F,Local0)
- Decrement (Local0)
- } Else {
- Or (Local0, 0x80,Local0)
- }
- Store (Local0, PIRG)
- } // End of _SRS Method
-}
-
-Device(LNKH) { // PCI IRQ link H
- Name (_HID,EISAID("PNP0C0F"))
-
- //Name(_UID, 8)
-
- Method (_STA,0,NotSerialized) {
- If (And(PIRH, 0x80)) {
- Return(0x9)
- } Else {
- Return(0xB)
- } // Don't display
- }
-
- Method (_DIS,0,NotSerialized) {
- Or(PIRH, 0x80,PIRH)
- }
-
- Method (_CRS,0,Serialized) {
- Name(BUF0, ResourceTemplate()
- {IRQ(Level,ActiveLow,Shared){0}})
- //
- // Define references to buffer elements
- //
- CreateWordField (BUF0, 0x01, IRQW) // IRQ low
- //
- // Write current settings into IRQ descriptor
- //
- If (And (PIRH, 0x80)) {
- Store (Zero, Local0)
- } Else {
- Store (One,Local0)
- }
- //
- // Shift 1 by value in register 70, Save in buffer
- //
- ShiftLeft (Local0,And(PIRH,0x0F),IRQW)
- Return (BUF0)
- } // End of _CRS method
-
- Name(_PRS, ResourceTemplate()
- {IRQ(Level,ActiveLow,Shared){3,4,5,6,7,9,10,11,12,14,15}})
-
- Method (_SRS,1,NotSerialized) {
- CreateWordField (ARG0, 0x01, IRQW) // IRQ low
- FindSetRightBit (IRQW,Local0)// Set IRQ
- If (LNotEqual (IRQW,Zero)) {
- And (Local0, 0x7F,Local0)
- Decrement (Local0)
- } Else {
- Or (Local0, 0x80,Local0)
- }
- Store (Local0, PIRH)
- }
-}
diff --git a/src/soc/intel/fsp_broadwell_de/acpi/lpc.asl b/src/soc/intel/fsp_broadwell_de/acpi/lpc.asl
deleted file mode 100644
index ef1e655100..0000000000
--- a/src/soc/intel/fsp_broadwell_de/acpi/lpc.asl
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- * Copyright (C) 2013 Google Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/* Intel LPC Bus Device - 0:1f.0 */
-
-Device (LPC0)
-{
- Name(_ADR, 0x001f0000)
-
- #include "irqlinks.asl"
-
- Device (FWH) // Firmware Hub
- {
- Name (_HID, EISAID("INT0800"))
- Name (_CRS, ResourceTemplate()
- {
- Memory32Fixed(ReadOnly, 0xff000000, 0x01000000)
- })
- }
-
- Device (HPET)
- {
- Name (_HID, EISAID("PNP0103"))
- Name (_CID, 0x010CD041)
-
- Method (_STA, 0) // Device Status
- {
- Return (0xf) // Enable and show device
- }
-
- Name(_CRS, ResourceTemplate()
- {
- Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400)
- })
- }
-
- Device(LDRC) // LPC device: Resource consumption
- {
- Name (_HID, EISAID("PNP0C02"))
- Name (_UID, 2)
-
- Name (RBUF, ResourceTemplate()
- {
- IO (Decode16, 0x61, 0x61, 0x1, 0x01) // NMI Status
- IO (Decode16, 0x63, 0x63, 0x1, 0x01) // CPU Reserved
- IO (Decode16, 0x65, 0x65, 0x1, 0x01) // CPU Reserved
- IO (Decode16, 0x67, 0x67, 0x1, 0x01) // CPU Reserved
- IO (Decode16, 0x80, 0x80, 0x1, 0x01) // Port 80 Post
- IO (Decode16, 0x92, 0x92, 0x1, 0x01) // CPU Reserved
- IO (Decode16, 0xb2, 0xb2, 0x1, 0x02) // SWSMI
- })
-
- Method (_CRS, 0, NotSerialized)
- {
- Return (RBUF)
- }
- }
-
- Device (RTC) // Real Time Clock
- {
- Name (_HID, EISAID("PNP0B00"))
- Name (_CRS, ResourceTemplate()
- {
- IO (Decode16, 0x70, 0x70, 1, 8)
- })
- }
-
- Device (TIMR) // Intel 8254 timer
- {
- Name(_HID, EISAID("PNP0100"))
- Name(_CRS, ResourceTemplate()
- {
- IO (Decode16, 0x40, 0x40, 0x01, 0x04)
- IO (Decode16, 0x50, 0x50, 0x10, 0x04)
- IRQNoFlags() {0}
- })
- }
-}
diff --git a/src/soc/intel/fsp_broadwell_de/acpi/pcie1.asl b/src/soc/intel/fsp_broadwell_de/acpi/pcie1.asl
deleted file mode 100644
index 950a3622db..0000000000
--- a/src/soc/intel/fsp_broadwell_de/acpi/pcie1.asl
+++ /dev/null
@@ -1,465 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015-2016 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-Name (PR01, Package() {
- // [SL01]: PCI Express Slot 1 on 1A on PCI0
- Package() { 0x0000FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x0000FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x0000FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x0000FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-})
-
-Name (AR01, Package() {
- // [SL01]: PCI Express Slot 1 on 1A on PCI0
- Package() { 0x0000FFFF, 0, 0, 16 },
- Package() { 0x0000FFFF, 1, 0, 17 },
- Package() { 0x0000FFFF, 2, 0, 18 },
- Package() { 0x0000FFFF, 3, 0, 19 },
-})
-
-Name (AH01, Package() {
- // [SL01]: PCI Express Slot 1 on 1A on PCI0
- Package() { 0x0000FFFF, 0, 0, 26 },
- Package() { 0x0000FFFF, 1, 0, 28 },
- Package() { 0x0000FFFF, 2, 0, 29 },
- Package() { 0x0000FFFF, 3, 0, 30 },
-})
-
-Name (PR02, Package() {
- // [SL02]: PCI Express Slot 2 on 1B on PCI0
- Package() { 0x0000FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x0000FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x0000FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x0000FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-})
-
-Name (AR02, Package() {
- // [SL02]: PCI Express Slot 2 on 1B on PCI0
- Package() { 0x0000FFFF, 0, 0, 16 },
- Package() { 0x0000FFFF, 1, 0, 17 },
- Package() { 0x0000FFFF, 2, 0, 18 },
- Package() { 0x0000FFFF, 3, 0, 19 },
-})
-
-Name (AH02, Package() {
- // [SL02]: PCI Express Slot 2 on 1B on PCI0
- Package() { 0x0000FFFF, 0, 0, 27 },
- Package() { 0x0000FFFF, 1, 0, 30 },
- Package() { 0x0000FFFF, 2, 0, 28 },
- Package() { 0x0000FFFF, 3, 0, 29 },
-})
-
-Name (PR03, Package() {
- // [CB0I]: CB3DMA on IOSF
- Package() { 0x0000FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- // [CB0J]: CB3DMA on IOSF
- Package() { 0x0000FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- // [CB0K]: CB3DMA on IOSF
- Package() { 0x0000FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- // [CB0L]: CB3DMA on IOSF
- Package() { 0x0000FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-})
-
-Name (AR03, Package() {
- // [CB0I]: CB3DMA on IOSF
- Package() { 0x0000FFFF, 0, 0, 16 },
- // [CB0J]: CB3DMA on IOSF
- Package() { 0x0000FFFF, 1, 0, 17 },
- // [CB0K]: CB3DMA on IOSF
- Package() { 0x0000FFFF, 2, 0, 18 },
- // [CB0L]: CB3DMA on IOSF
- Package() { 0x0000FFFF, 3, 0, 19 },
-})
-
-Name (AH03, Package() {
- // [CB0I]: CB3DMA on IOSF
- Package() { 0x0000FFFF, 0, 0, 32 },
- // [CB0J]: CB3DMA on IOSF
- Package() { 0x0000FFFF, 1, 0, 36 },
- // [CB0K]: CB3DMA on IOSF
- Package() { 0x0000FFFF, 2, 0, 37 },
- // [CB0L]: CB3DMA on IOSF
- Package() { 0x0000FFFF, 3, 0, 38 },
-})
-
-Name (PR04, Package() {
- // [SL04]: PCI Express Slot 4 on 2B on PCI0
- Package() { 0x0000FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x0000FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x0000FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x0000FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-})
-
-Name (AR04, Package() {
- // [SL04]: PCI Express Slot 4 on 2B on PCI0
- Package() { 0x0000FFFF, 0, 0, 16 },
- Package() { 0x0000FFFF, 1, 0, 17 },
- Package() { 0x0000FFFF, 2, 0, 18 },
- Package() { 0x0000FFFF, 3, 0, 19 },
-})
-
-Name (AH04, Package() {
- // [SL04]: PCI Express Slot 4 on 2B on PCI0
- Package() { 0x0000FFFF, 0, 0, 33 },
- Package() { 0x0000FFFF, 1, 0, 37 },
- Package() { 0x0000FFFF, 2, 0, 38 },
- Package() { 0x0000FFFF, 3, 0, 36 },
-})
-
-Name (PR05, Package() {
- // [SL05]: PCI Express Slot 5 on 2C on PCI0
- Package() { 0x0000FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x0000FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x0000FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x0000FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-})
-
-Name (AR05, Package() {
- // [SL05]: PCI Express Slot 5 on 2C on PCI0
- Package() { 0x0000FFFF, 0, 0, 16 },
- Package() { 0x0000FFFF, 1, 0, 17 },
- Package() { 0x0000FFFF, 2, 0, 18 },
- Package() { 0x0000FFFF, 3, 0, 19 },
-})
-
-Name (AH05, Package() {
- // [SL05]: PCI Express Slot 5 on 2C on PCI0
- Package() { 0x0000FFFF, 0, 0, 34 },
- Package() { 0x0000FFFF, 1, 0, 37 },
- Package() { 0x0000FFFF, 2, 0, 36 },
- Package() { 0x0000FFFF, 3, 0, 38 },
-})
-
-Name (PR06, Package() {
- // [SL06]: PCI Express Slot 6 on 2D on PCI0
- Package() { 0x0000FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x0000FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x0000FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x0000FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-})
-
-Name (AR06, Package() {
- // [SL06]: PCI Express Slot 6 on 2D on PCI0
- Package() { 0x0000FFFF, 0, 0, 16 },
- Package() { 0x0000FFFF, 1, 0, 17 },
- Package() { 0x0000FFFF, 2, 0, 18 },
- Package() { 0x0000FFFF, 3, 0, 19 },
-})
-
-Name (AH06, Package() {
- // [SL06]: PCI Express Slot 6 on 2D on PCI0
- Package() { 0x0000FFFF, 0, 0, 35 },
- Package() { 0x0000FFFF, 1, 0, 36 },
- Package() { 0x0000FFFF, 2, 0, 38 },
- Package() { 0x0000FFFF, 3, 0, 37 },
-})
-
-Name (PR07, Package() {
- // [SL07]: PCI Express Slot 7 on 3A on PCI0
- Package() { 0x0000FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x0000FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x0000FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x0000FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-})
-
-Name (AR07, Package() {
- // [SL07]: PCI Express Slot 7 on 3A on PCI0
- Package() { 0x0000FFFF, 0, 0, 16 },
- Package() { 0x0000FFFF, 1, 0, 17 },
- Package() { 0x0000FFFF, 2, 0, 18 },
- Package() { 0x0000FFFF, 3, 0, 19 },
-})
-
-Name (AH07, Package() {
- // [SL07]: PCI Express Slot 7 on 3A on PCI0
- Package() { 0x0000FFFF, 0, 0, 40 },
- Package() { 0x0000FFFF, 1, 0, 44 },
- Package() { 0x0000FFFF, 2, 0, 45 },
- Package() { 0x0000FFFF, 3, 0, 46 },
-})
-
-Name (PR08, Package() {
- // [SL08]: PCI Express Slot 8 on 3B on PCI0
- Package() { 0x0000FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x0000FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x0000FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x0000FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-})
-
-Name (AR08, Package() {
- // [SL08]: PCI Express Slot 8 on 3B on PCI0
- Package() { 0x0000FFFF, 0, 0, 16 },
- Package() { 0x0000FFFF, 1, 0, 17 },
- Package() { 0x0000FFFF, 2, 0, 18 },
- Package() { 0x0000FFFF, 3, 0, 19 },
-})
-
-Name (AH08, Package() {
- // [SL08]: PCI Express Slot 8 on 3B on PCI0
- Package() { 0x0000FFFF, 0, 0, 41 },
- Package() { 0x0000FFFF, 1, 0, 45 },
- Package() { 0x0000FFFF, 2, 0, 46 },
- Package() { 0x0000FFFF, 3, 0, 44 },
-})
-
-Name (PR09, Package() {
- // [SL09]: PCI Express Slot 9 on 3C on PCI0
- Package() { 0x0000FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x0000FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x0000FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x0000FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-})
-
-Name (AR09, Package() {
- // [SL09]: PCI Express Slot 9 on 3C on PCI0
- Package() { 0x0000FFFF, 0, 0, 16 },
- Package() { 0x0000FFFF, 1, 0, 17 },
- Package() { 0x0000FFFF, 2, 0, 18 },
- Package() { 0x0000FFFF, 3, 0, 19 },
-})
-
-Name (AH09, Package() {
- // [SL09]: PCI Express Slot 9 on 3C on PCI0
- Package() { 0x0000FFFF, 0, 0, 42 },
- Package() { 0x0000FFFF, 1, 0, 45 },
- Package() { 0x0000FFFF, 2, 0, 44 },
- Package() { 0x0000FFFF, 3, 0, 46 },
-})
-
-Name (PR0A, Package() {
- // [SL0A]: PCI Express Slot 10 on 3D on PCI0
- Package() { 0x0000FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x0000FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x0000FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x0000FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-})
-
-Name (AR0A, Package() {
- // [SL0A]: PCI Express Slot 10 on 3D on PCI0
- Package() { 0x0000FFFF, 0, 0, 16 },
- Package() { 0x0000FFFF, 1, 0, 17 },
- Package() { 0x0000FFFF, 2, 0, 18 },
- Package() { 0x0000FFFF, 3, 0, 19 },
-})
-
-Name (AH0A, Package() {
- // [SL0A]: PCI Express Slot 10 on 3D on PCI0
- Package() { 0x0000FFFF, 0, 0, 43 },
- Package() { 0x0000FFFF, 1, 0, 44 },
- Package() { 0x0000FFFF, 2, 0, 46 },
- Package() { 0x0000FFFF, 3, 0, 45 },
-})
-
-
- // PCI Express Port 1A on PCI0
-Device (BR1A) {
- Name (_ADR, 0x00010000)
- Method (_PRW, 0) {
- Return (Package (0x02) {0x09, 0x04})
- }
- Method (_PRT, 0) {
- If (LEqual(PICM, Zero)) {
- Return (PR01)
- }
- If (LEqual(APC1, One)) {
- Return (AH01)
- }
- Return (AR01)
- }
-
-}
-
-// PCI Express Port 1B on PCI0
-Device (BR1B) {
- Name (_ADR, 0x00010001)
- Method (_PRW, 0) {
- Return (Package (0x02) {0x09, 0x04})
- }
- Method (_PRT, 0) {
- If (LEqual(PICM, Zero)) {
- Return (PR02)
- }
- If (LEqual(APC1, One)) {
- Return (AH02)
- }
- Return (AR02)
- }
-
-}
-
-// PCI Express Port 2A on PCI0
-Device (BR2A) {
- Name (_ADR, 0x00020000)
- Method (_PRW, 0) {
- Return (Package (0x02) {0x09, 0x04})
- }
- Method (_PRT, 0) {
- If (LEqual(PICM, Zero)) {
- Return (PR03)
- }
- If (LEqual(APC1, One)) {
- Return (AH03)
- }
- Return (AR03)
- }
-
-
- // CB3DMA on IOSF
- Device (CB0I) {
- Name (_ADR, 0x00000000)
- }
-
- // CB3DMA on IOSF
- Device (CB0J) {
- Name (_ADR, 0x00000001)
- }
-
- // CB3DMA on IOSF
- Device (CB0K) {
- Name (_ADR, 0x00000002)
- }
-
- // CB3DMA on IOSF
- Device (CB0L) {
- Name (_ADR, 0x00000003)
- }
-}
-
-// PCI Express Port 2B on PCI0
-Device (BR2B) {
- Name (_ADR, 0x00020001)
- Method (_PRW, 0) {
- Return (Package (0x02) {0x09, 0x04})
- }
- Method (_PRT, 0) {
- If (LEqual(PICM, Zero)) {
- Return (PR04)
- }
- If (LEqual(APC1, One)) {
- Return (AH04)
- }
- Return (AR04)
- }
-
-}
-
-// PCI Express Port 2C on PCI0
-Device (BR2C) {
- Name (_ADR, 0x00020002)
- Method (_PRW, 0) {
- Return (Package (0x02) {0x09, 0x04})
- }
- Method (_PRT, 0) {
- If (LEqual(PICM, Zero)) {
- Return (PR05)
- }
- If (LEqual(APC1, One)) {
- Return (AH05)
- }
- Return (AR05)
- }
-
-}
-
-// PCI Express Port 2D on PCI0
-Device (BR2D) {
- Name (_ADR, 0x00020003)
- Method (_PRW, 0) {
- Return (Package (0x02) {0x09, 0x04})
- }
- Method (_PRT, 0) {
- If (LEqual(PICM, Zero)) {
- Return (PR06)
- }
- If (LEqual(APC1, One)) {
- Return (AH06)
- }
- Return (AR06)
- }
-
-}
-
-// PCI Express Port 3A on PCI0
-Device (BR3A) {
- Name (_ADR, 0x00030000)
- Method (_PRW, 0) {
- Return (Package (0x02) {0x09, 0x04})
- }
- Method (_PRT, 0) {
- If (LEqual(PICM, Zero)) {
- Return (PR07)
- }
- If (LEqual(APC1, One)) {
- Return (AH07)
- }
- Return (AR07)
- }
-
-}
-
-// PCI Express Port 3B on PCI0
-Device (BR3B) {
- Name (_ADR, 0x00030001)
- Method (_PRW, 0) {
- Return (Package (0x02) {0x09, 0x04})
- }
- Method (_PRT, 0) {
- If (LEqual(PICM, Zero)) {
- Return (PR08)
- }
- If (LEqual(APC1, One)) {
- Return (AH08)
- }
- Return (AR08)
- }
-
-}
-
-// PCI Express Port 3C on PCI0
-Device (BR3C) {
- Name (_ADR, 0x00030002)
- Method (_PRW, 0) {
- Return (Package (0x02) {0x09, 0x04})
- }
- Method (_PRT, 0) {
- If (LEqual(PICM, Zero)) {
- Return (PR09)
- }
- If (LEqual(APC1, One)) {
- Return (AH09)
- }
- Return (AR09)
- }
-
-}
-
-// PCI Express Port 3D on PCI0
-Device (BR3D) {
- Name (_ADR, 0x00030003)
- Method (_PRW, 0) {
- Return (Package (0x02) {0x09, 0x04})
- }
- Method (_PRT, 0) {
- If (LEqual(PICM, Zero)) {
- Return (PR0A)
- }
- If (LEqual(APC1, One)) {
- Return (AH0A)
- }
- Return (AR0A)
- }
-
-}
diff --git a/src/soc/intel/fsp_broadwell_de/acpi/southcluster.asl b/src/soc/intel/fsp_broadwell_de/acpi/southcluster.asl
deleted file mode 100644
index ff30f9f758..0000000000
--- a/src/soc/intel/fsp_broadwell_de/acpi/southcluster.asl
+++ /dev/null
@@ -1,349 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013 Google Inc.
- * Copyright (C) 2015-2016 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <soc/iomap.h>
-#include <soc/irq.h>
-
-Name(_HID,EISAID("PNP0A08")) // PCIe
-Name(_CID,EISAID("PNP0A03")) // PCI
-
-Name(_BBN, 0)
-
-Name (MCRS, ResourceTemplate() {
- // Bus Numbers
- WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
- 0x0000, 0x0000, 0x00fe, 0x0000, 0xff,,, PB00)
-
- // IO Region 0
- DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
- 0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8,,, PI00)
-
- // PCI Config Space
- Io (Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008)
-
- // IO Region 1
- DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
- 0x0000, 0x0d00, 0xefff, 0x0000, 0xE300,,, PI01)
-
- // VGA memory (0xa0000-0xbffff)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
- Cacheable, ReadWrite,
- 0x00000000, 0x000a0000, 0x000bffff, 0x00000000,
- 0x00020000,,, ASEG)
-
- // OPROM reserved (0xc0000-0xc3fff)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
- Cacheable, ReadWrite,
- 0x00000000, 0x000c0000, 0x000c3fff, 0x00000000,
- 0x00004000,,, OPR0)
-
- // OPROM reserved (0xc4000-0xc7fff)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
- Cacheable, ReadWrite,
- 0x00000000, 0x000c4000, 0x000c7fff, 0x00000000,
- 0x00004000,,, OPR1)
-
- // OPROM reserved (0xc8000-0xcbfff)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
- Cacheable, ReadWrite,
- 0x00000000, 0x000c8000, 0x000cbfff, 0x00000000,
- 0x00004000,,, OPR2)
-
- // OPROM reserved (0xcc000-0xcffff)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
- Cacheable, ReadWrite,
- 0x00000000, 0x000cc000, 0x000cffff, 0x00000000,
- 0x00004000,,, OPR3)
-
- // OPROM reserved (0xd0000-0xd3fff)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
- Cacheable, ReadWrite,
- 0x00000000, 0x000d0000, 0x000d3fff, 0x00000000,
- 0x00004000,,, OPR4)
-
- // OPROM reserved (0xd4000-0xd7fff)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
- Cacheable, ReadWrite,
- 0x00000000, 0x000d4000, 0x000d7fff, 0x00000000,
- 0x00004000,,, OPR5)
-
- // OPROM reserved (0xd8000-0xdbfff)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
- Cacheable, ReadWrite,
- 0x00000000, 0x000d8000, 0x000dbfff, 0x00000000,
- 0x00004000,,, OPR6)
-
- // OPROM reserved (0xdc000-0xdffff)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
- Cacheable, ReadWrite,
- 0x00000000, 0x000dc000, 0x000dffff, 0x00000000,
- 0x00004000,,, OPR7)
-
- // BIOS Extension (0xe0000-0xe3fff)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
- Cacheable, ReadWrite,
- 0x00000000, 0x000e0000, 0x000e3fff, 0x00000000,
- 0x00004000,,, ESG0)
-
- // BIOS Extension (0xe4000-0xe7fff)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
- Cacheable, ReadWrite,
- 0x00000000, 0x000e4000, 0x000e7fff, 0x00000000,
- 0x00004000,,, ESG1)
-
- // BIOS Extension (0xe8000-0xebfff)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
- Cacheable, ReadWrite,
- 0x00000000, 0x000e8000, 0x000ebfff, 0x00000000,
- 0x00004000,,, ESG2)
-
- // BIOS Extension (0xec000-0xeffff)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
- Cacheable, ReadWrite,
- 0x00000000, 0x000ec000, 0x000effff, 0x00000000,
- 0x00004000,,, ESG3)
-
- // System BIOS (0xf0000-0xfffff)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
- Cacheable, ReadWrite,
- 0x00000000, 0x000f0000, 0x000fffff, 0x00000000,
- 0x00010000,,, FSEG)
-
- // PCI Memory Region (Top of memory-0xfeafffff)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
- Cacheable, ReadWrite,
- 0x00000000, 0x90000000, 0xFEAFFFFF, 0x00000000,
- 0x6EB00000,,, PMEM)
-
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
- Cacheable, ReadWrite,
- 0x00000000, 0xfec00000, 0xfecfffff, 0x00000000,
- 0x00100000,,, APIC)
-
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
- Cacheable, ReadWrite,
- 0x00000000, 0xfed00000, 0xfedfffff, 0x00000000,
- 0x00100000,,, PCHR)
-
- QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
- 0x0000000000000000, // Granularity
- 0x0000380000000000, // Range Minimum
- 0x0000383FFFFFFFFF, // Range Maximum
- 0x0000000000000000, // Translation Offset
- 0x0000004000000000, // Length
- ,,, AddressRangeMemory, TypeStatic)
-})
-
-Method (_CRS, 0, Serialized) {
- Return (MCRS)
-}
-
-/* Device Resource Consumption */
-Device (PDRC) {
- Name (_HID, EISAID("PNP0C02"))
- Name (_UID, 1)
-
- Name (PDRS, ResourceTemplate() {
- Memory32Fixed(ReadWrite, ABORT_BASE_ADDRESS, ABORT_BASE_SIZE)
- Memory32Fixed(ReadWrite, PSEG_BASE_ADDRESS, PSEG_BASE_SIZE)
- Memory32Fixed(ReadWrite, IOXAPIC1_BASE_ADDRESS, IOXAPIC1_BASE_SIZE)
- Memory32Fixed(ReadWrite, IOXAPIC2_BASE_ADDRESS, IOXAPIC2_BASE_SIZE)
- Memory32Fixed(ReadWrite, PCH_BASE_ADDRESS, PCH_BASE_SIZE)
- Memory32Fixed(ReadWrite, LXAPIC_BASE_ADDRESS, LXAPIC_BASE_SIZE)
- Memory32Fixed(ReadWrite, FIRMWARE_BASE_ADDRESS, FIRMWARE_BASE_SIZE)
- })
-
- // Current Resource Settings
- Method (_CRS, 0, Serialized)
- {
- Return(PDRS)
- }
-}
-
-Method (_OSC, 4) {
- /* Check for proper GUID */
- If (LEqual (Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")))
- {
- /* Let OS control everything */
- Return (Arg3)
- }
- Else
- {
- /* Unrecognized UUID */
- CreateDWordField (Arg3, 0, CDW1)
- Or (CDW1, 4, CDW1)
- Return (Arg3)
- }
-}
-
-Name (PR00, Package() {
- // [DMI0]: Legacy PCI Express Port 0 on PCI0
- Package() { 0x0000FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- // [BR1A]: PCI Express Port 1A on PCI0
- // [BR1B]: PCI Express Port 1B on PCI0
- Package() { 0x0001FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- // [BR2A]: PCI Express Port 2A on PCI0
- // [BR2B]: PCI Express Port 2B on PCI0
- // [BR2C]: PCI Express Port 2C on PCI0
- // [BR2D]: PCI Express Port 2D on PCI0
- Package() { 0x0002FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- // [BR3A]: PCI Express Port 3A on PCI0
- // [BR3B]: PCI Express Port 3B on PCI0
- // [BR3C]: PCI Express Port 3C on PCI0
- // [BR3D]: PCI Express Port 3D on PCI0
- Package() { 0x0003FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- // [CB0A]: CB3DMA on PCI0
- // [CB0E]: CB3DMA on PCI0
- Package() { 0x0004FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- // [CB0B]: CB3DMA on PCI0
- // [CB0F]: CB3DMA on PCI0
- Package() { 0x0004FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- // [CB0C]: CB3DMA on PCI0
- // [CB0G]: CB3DMA on PCI0
- Package() { 0x0004FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- // [CB0D]: CB3DMA on PCI0
- // [CB0H]: CB3DMA on PCI0
- Package() { 0x0004FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
- // [IIM0]: IIOMISC on PCI0
- Package() { 0x0005FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x0005FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x0005FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x0005FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
- // [IID0]: IIODFX0 on PCI0
- Package() { 0x0006FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x0006FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x0006FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x0006FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
- // [XHCI]: xHCI controller 1 on PCH
- Package() { 0x0014FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
- // [HECI]: ME HECI on PCH
- // [IDER]: ME IDE redirect on PCH
- Package() { 0x0016FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- // [HEC2]: ME HECI2 on PCH
- // [MEKT]: MEKT on PCH
- Package() { 0x0016FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- // [GBEM]: GbE Controller VPRO
- Package() { 0x0019FFFF, 0, \_SB.PCI0.LPC0.LNKE, 0 },
- // [EHC2]: EHCI controller #2 on PCH
- Package() { 0x001AFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- // [ALZA]: High definition Audio Controller
- Package() { 0x001BFFFF, 0, \_SB.PCI0.LPC0.LNKG, 0 },
- // [RP01]: Pci Express Port 1 on PCH
- // [RP05]: Pci Express Port 5 on PCH
- Package() { 0x001CFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- // [RP02]: Pci Express Port 2 on PCH
- // [RP06]: Pci Express Port 6 on PCH
- Package() { 0x001CFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- // [RP03]: Pci Express Port 3 on PCH
- // [RP07]: Pci Express Port 7 on PCH
- Package() { 0x001CFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- // [RP04]: Pci Express Port 4 on PCH
- // [RP08]: Pci Express Port 8 on ICH
- Package() { 0x001CFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
- // [EHC1]: EHCI controller #1 on PCH
- Package() { 0x001DFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- // [SAT1]: SATA controller 1 on PCH
- // [SAT2]: SATA Host controller 2 on PCH
- Package() { 0x001FFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- // [SMBS]: SMBus controller on PCH
- // [TERM]: Thermal Subsystem on ICH
- Package() { 0x001FFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-})
-
-Name (AR00, Package() {
- // [DMI0]: Legacy PCI Express Port 0 on PCI0
- Package() { 0x0000FFFF, 0, 0, 47 },
- // [BR1A]: PCI Express Port 1A on PCI0
- // [BR1B]: PCI Express Port 1B on PCI0
- Package() { 0x0001FFFF, 0, 0, 47 },
- // [BR2A]: PCI Express Port 2A on PCI0
- // [BR2B]: PCI Express Port 2B on PCI0
- // [BR2C]: PCI Express Port 2C on PCI0
- // [BR2D]: PCI Express Port 2D on PCI0
- Package() { 0x0002FFFF, 0, 0, 47 },
- // [BR3A]: PCI Express Port 3A on PCI0
- // [BR3B]: PCI Express Port 3B on PCI0
- // [BR3C]: PCI Express Port 3C on PCI0
- // [BR3D]: PCI Express Port 3D on PCI0
- Package() { 0x0003FFFF, 0, 0, 47 },
- // [CB0A]: CB3DMA on PCI0
- // [CB0E]: CB3DMA on PCI0
- Package() { 0x0004FFFF, 0, 0, 31 },
- // [CB0B]: CB3DMA on PCI0
- // [CB0F]: CB3DMA on PCI0
- Package() { 0x0004FFFF, 1, 0, 39 },
- // [CB0C]: CB3DMA on PCI0
- // [CB0G]: CB3DMA on PCI0
- Package() { 0x0004FFFF, 2, 0, 31 },
- // [CB0D]: CB3DMA on PCI0
- // [CB0H]: CB3DMA on PCI0
- Package() { 0x0004FFFF, 3, 0, 39 },
- // [IIM0]: IIOMISC on PCI0
- Package() { 0x0005FFFF, 0, 0, 16 },
- Package() { 0x0005FFFF, 1, 0, 17 },
- Package() { 0x0005FFFF, 2, 0, 18 },
- Package() { 0x0005FFFF, 3, 0, 19 },
- // [IID0]: IIODFX0 on PCI0
- Package() { 0x0006FFFF, 0, 0, 16 },
- Package() { 0x0006FFFF, 1, 0, 17 },
- Package() { 0x0006FFFF, 2, 0, 18 },
- Package() { 0x0006FFFF, 3, 0, 19 },
- // [XHCI]: xHCI controller 1 on PCH
- Package() { 0x0014FFFF, 3, 0, 19 },
- // [HECI]: ME HECI on PCH
- // [IDER]: ME IDE redirect on PCH
- Package() { 0x0016FFFF, 0, 0, 16 },
- // [HEC2]: ME HECI2 on PCH
- // [MEKT]: MEKT on PCH
- Package() { 0x0016FFFF, 1, 0, 17 },
- // [GBEM]: GbE Controller VPRO
- Package() { 0x0019FFFF, 0, 0, 20 },
- // [EHC2]: EHCI controller #2 on PCH
- Package() { 0x001AFFFF, 2, 0, 18 },
- // [ALZA]: High definition Audio Controller
- Package() { 0x001BFFFF, 0, 0, 22 },
- // [RP01]: Pci Express Port 1 on PCH
- // [RP05]: Pci Express Port 5 on PCH
- Package() { 0x001CFFFF, 0, 0, 16 },
- // [RP02]: Pci Express Port 2 on PCH
- // [RP06]: Pci Express Port 6 on PCH
- Package() { 0x001CFFFF, 1, 0, 17 },
- // [RP03]: Pci Express Port 3 on PCH
- // [RP07]: Pci Express Port 7 on PCH
- Package() { 0x001CFFFF, 2, 0, 18 },
- // [RP04]: Pci Express Port 4 on PCH
- // [RP08]: Pci Express Port 8 on ICH
- Package() { 0x001CFFFF, 3, 0, 19 },
- // [EHC1]: EHCI controller #1 on PCH
- Package() { 0x001DFFFF, 2, 0, 18 },
- // [SAT1]: SATA controller 1 on PCH
- // [SAT2]: SATA Host controller 2 on PCH
- Package() { 0x001FFFFF, 0, 0, 16 },
- // [SMBS]: SMBus controller on PCH
- // [TERM]: Thermal Subsystem on ICH
- Package() { 0x001FFFFF, 2, 0, 18 },
-})
-
-// Socket 0 Root bridge
-Method (_PRT, 0) {
- If (LEqual(PICM, Zero)) {
- Return (PR00)
- }
- Return (AR00) // If you disable the IOxAPIC in IIO, you should return AR00
-}
-
-#include "lpc.asl"
diff --git a/src/soc/intel/fsp_broadwell_de/acpi/uncore.asl b/src/soc/intel/fsp_broadwell_de/acpi/uncore.asl
deleted file mode 100644
index 86b1410c39..0000000000
--- a/src/soc/intel/fsp_broadwell_de/acpi/uncore.asl
+++ /dev/null
@@ -1,267 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013 Google Inc.
- * Copyright (C) 2015-2016 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
- Name (PRUN, Package() {
- Package() { 0x0008FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x0008FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x0008FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x0008FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
- Package() { 0x0009FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x0009FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x0009FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x0009FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
- Package() { 0x000AFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x000AFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x000AFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x000AFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
- Package() { 0x000BFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x000BFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x000BFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x000BFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
- Package() { 0x000CFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x000CFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x000CFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x000CFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
- Package() { 0x000DFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x000DFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x000DFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x000DFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
- Package() { 0x000EFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x000EFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x000EFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x000EFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
- Package() { 0x000FFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x000FFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x000FFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x000FFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
- Package() { 0x0010FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x0010FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x0010FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x0010FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
- Package() { 0x0011FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x0011FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x0011FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x0011FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
- Package() { 0x0012FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x0012FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x0012FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x0012FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
- Package() { 0x0013FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x0013FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x0013FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x0013FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
- Package() { 0x0014FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x0014FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x0014FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x0014FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
- Package() { 0x0016FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x0016FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x0016FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x0016FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
- Package() { 0x0017FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x0017FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x0017FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x0017FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
- Package() { 0x0018FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x0018FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x0018FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x0018FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
- Package() { 0x0019FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x0019FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x0019FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x0019FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
- Package() { 0x001CFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x001CFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x001CFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x001CFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
- Package() { 0x001DFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x001DFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x001DFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x001DFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
- Package() { 0x001EFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x001EFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x001EFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x001EFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
- Package() { 0x001FFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
- Package() { 0x001FFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
- Package() { 0x001FFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
- Package() { 0x001FFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-})
-
-Name (ARUN, Package() {
- Package() { 0x0008FFFF, 0, 0, 16 },
- Package() { 0x0008FFFF, 1, 0, 17 },
- Package() { 0x0008FFFF, 2, 0, 18 },
- Package() { 0x0008FFFF, 3, 0, 19 },
-
- Package() { 0x0009FFFF, 0, 0, 16 },
- Package() { 0x0009FFFF, 1, 0, 17 },
- Package() { 0x0009FFFF, 2, 0, 18 },
- Package() { 0x0009FFFF, 3, 0, 19 },
-
- Package() { 0x000AFFFF, 0, 0, 16 },
- Package() { 0x000AFFFF, 1, 0, 17 },
- Package() { 0x000AFFFF, 2, 0, 18 },
- Package() { 0x000AFFFF, 3, 0, 19 },
-
- Package() { 0x000BFFFF, 0, 0, 16 },
- Package() { 0x000BFFFF, 1, 0, 17 },
- Package() { 0x000BFFFF, 2, 0, 18 },
- Package() { 0x000BFFFF, 3, 0, 19 },
-
- Package() { 0x000CFFFF, 0, 0, 16 },
- Package() { 0x000CFFFF, 1, 0, 17 },
- Package() { 0x000CFFFF, 2, 0, 18 },
- Package() { 0x000CFFFF, 3, 0, 19 },
-
- Package() { 0x000DFFFF, 0, 0, 16 },
- Package() { 0x000DFFFF, 1, 0, 17 },
- Package() { 0x000DFFFF, 2, 0, 18 },
- Package() { 0x000DFFFF, 3, 0, 19 },
-
- Package() { 0x000EFFFF, 0, 0, 16 },
- Package() { 0x000EFFFF, 1, 0, 17 },
- Package() { 0x000EFFFF, 2, 0, 18 },
- Package() { 0x000EFFFF, 3, 0, 19 },
-
- Package() { 0x000FFFFF, 0, 0, 16 },
- Package() { 0x000FFFFF, 1, 0, 17 },
- Package() { 0x000FFFFF, 2, 0, 18 },
- Package() { 0x000FFFFF, 3, 0, 19 },
-
- Package() { 0x0010FFFF, 0, 0, 16 },
- Package() { 0x0010FFFF, 1, 0, 17 },
- Package() { 0x0010FFFF, 2, 0, 18 },
- Package() { 0x0010FFFF, 3, 0, 19 },
-
- Package() { 0x0011FFFF, 0, 0, 16 },
- Package() { 0x0011FFFF, 1, 0, 17 },
- Package() { 0x0011FFFF, 2, 0, 18 },
- Package() { 0x0011FFFF, 3, 0, 19 },
-
- Package() { 0x0012FFFF, 0, 0, 16 },
- Package() { 0x0012FFFF, 1, 0, 17 },
- Package() { 0x0012FFFF, 2, 0, 18 },
- Package() { 0x0012FFFF, 3, 0, 19 },
-
- Package() { 0x0013FFFF, 0, 0, 16 },
- Package() { 0x0013FFFF, 1, 0, 17 },
- Package() { 0x0013FFFF, 2, 0, 18 },
- Package() { 0x0013FFFF, 3, 0, 19 },
-
- Package() { 0x0014FFFF, 0, 0, 16 },
- Package() { 0x0014FFFF, 1, 0, 17 },
- Package() { 0x0014FFFF, 2, 0, 18 },
- Package() { 0x0014FFFF, 3, 0, 19 },
-
- Package() { 0x0016FFFF, 0, 0, 16 },
- Package() { 0x0016FFFF, 1, 0, 17 },
- Package() { 0x0016FFFF, 2, 0, 18 },
- Package() { 0x0016FFFF, 3, 0, 19 },
-
- Package() { 0x0017FFFF, 0, 0, 16 },
- Package() { 0x0017FFFF, 1, 0, 17 },
- Package() { 0x0017FFFF, 2, 0, 18 },
- Package() { 0x0017FFFF, 3, 0, 19 },
-
- Package() { 0x0018FFFF, 0, 0, 16 },
- Package() { 0x0018FFFF, 1, 0, 17 },
- Package() { 0x0018FFFF, 2, 0, 18 },
- Package() { 0x0018FFFF, 3, 0, 19 },
-
- Package() { 0x0019FFFF, 0, 0, 16 },
- Package() { 0x0019FFFF, 1, 0, 17 },
- Package() { 0x0019FFFF, 2, 0, 18 },
- Package() { 0x0019FFFF, 3, 0, 19 },
-
- Package() { 0x001CFFFF, 0, 0, 16 },
- Package() { 0x001CFFFF, 1, 0, 17 },
- Package() { 0x001CFFFF, 2, 0, 18 },
- Package() { 0x001CFFFF, 3, 0, 19 },
-
- Package() { 0x001DFFFF, 0, 0, 16 },
- Package() { 0x001DFFFF, 1, 0, 17 },
- Package() { 0x001DFFFF, 2, 0, 18 },
- Package() { 0x001DFFFF, 3, 0, 19 },
-
- Package() { 0x001EFFFF, 0, 0, 16 },
- Package() { 0x001EFFFF, 1, 0, 17 },
- Package() { 0x001EFFFF, 2, 0, 18 },
- Package() { 0x001EFFFF, 3, 0, 19 },
-
- Package() { 0x001FFFFF, 0, 0, 16 },
- Package() { 0x001FFFFF, 1, 0, 17 },
- Package() { 0x001FFFFF, 2, 0, 18 },
- Package() { 0x001FFFFF, 3, 0, 19 },
-})
-
-Device (UNC0)
-{
- Name (_HID, EisaId ("PNP0A03"))
- Name (_UID, 0x3F)
- Method (_BBN, 0, NotSerialized)
- {
- Return (0xff)
- }
-
- Name (_ADR, 0x00)
- Method (_STA, 0, NotSerialized)
- {
- Return (0xf)
- }
-
- Name (_CRS, ResourceTemplate ()
- {
- WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
- 0x0000, // Granularity
- 0x00FF, // Range Minimum
- 0x00FF, // Range Maximum
- 0x0000, // Translation Offset
- 0x0001, // Length
- ,, )
- })
-
- Method (_PRT, 0, NotSerialized)
- {
- If (LEqual (PICM, Zero))
- {
- Return (PRUN)
- }
-
- Return (ARUN)
- }
-}