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| author | Werner Zeh <werner.zeh@siemens.com> | 2018-11-14 10:37:21 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-11-16 09:47:00 +0000 |
| commit | 73bbcee9327a25da8117a4caf864f8e3162a55c8 (patch) | |
| tree | 042f307548479150925e341b2d863a081ba94948 /src/soc/intel/fsp_broadwell_de/Kconfig | |
| parent | a0f29312b459235b60f41160d8a776a56d4ca3de (diff) | |
fsp_broadwell_de: Switch to common SPI controller driver
The common SPI controller driver in src/southbridge/intel/common does
match the SPI controller included in the PCH of Broadwell-DE SoC. Switch
to the usage of this driver and delete the dedicated one for the FSP
based Broadwell-DE implementation.
TEST: Boot mc_bdx1 with SPI driver active in romstage
Change-Id: I4fe8057ea1981e350659a5caa9912fb758110115
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/29633
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/fsp_broadwell_de/Kconfig')
| -rw-r--r-- | src/soc/intel/fsp_broadwell_de/Kconfig | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/fsp_broadwell_de/Kconfig b/src/soc/intel/fsp_broadwell_de/Kconfig index ec010b3882..7046ff04d4 100644 --- a/src/soc/intel/fsp_broadwell_de/Kconfig +++ b/src/soc/intel/fsp_broadwell_de/Kconfig @@ -12,12 +12,13 @@ config CPU_SPECIFIC_OPTIONS select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select SOUTHBRIDGE_INTEL_COMMON + select SOUTHBRIDGE_INTEL_COMMON_SPI select SOUTHBRIDGE_INTEL_COMMON_RESET select NO_RELOCATABLE_RAMSTAGE select PARALLEL_MP select SMP select IOAPIC - select SPI_FLASH select UDELAY_TSC select SUPPORT_CPU_UCODE_IN_CBFS # Microcode header files are delivered in FSP package |