diff options
| author | Julius Werner <jwerner@chromium.org> | 2019-03-05 16:53:33 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-08 08:33:24 +0000 |
| commit | cd49cce7b70e80b4acc49b56bb2bb94370b4d867 (patch) | |
| tree | 8e89136e2da7cf54453ba8c112eda94415b56242 /src/soc/intel/fsp_baytrail/spi.c | |
| parent | b3a8cc54dbaf833c590a56f912209a5632b71f49 (diff) | |
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
This patch is a raw application of
find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g'
Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/fsp_baytrail/spi.c')
| -rw-r--r-- | src/soc/intel/fsp_baytrail/spi.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/intel/fsp_baytrail/spi.c b/src/soc/intel/fsp_baytrail/spi.c index 4bc924c500..573c1c4390 100644 --- a/src/soc/intel/fsp_baytrail/spi.c +++ b/src/soc/intel/fsp_baytrail/spi.c @@ -138,7 +138,7 @@ enum { static uint8_t readb_(const void *addr) { uint8_t v = read8(addr); - if (IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)) { + if (CONFIG(DEBUG_SPI_FLASH)) { printk(BIOS_DEBUG, "SPI: read %2.2x from %4.4x\n", v, (((uint32_t) addr) & SPI_OFFSET_MASK)); } @@ -148,7 +148,7 @@ static uint8_t readb_(const void *addr) static uint16_t readw_(const void *addr) { uint16_t v = read16(addr); - if (IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)) { + if (CONFIG(DEBUG_SPI_FLASH)) { printk(BIOS_DEBUG, "SPI: read %4.4x from %4.4x\n", v, (((uint32_t) addr) & SPI_OFFSET_MASK)); } @@ -158,7 +158,7 @@ static uint16_t readw_(const void *addr) static uint32_t readl_(const void *addr) { uint32_t v = read32(addr); - if (IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)) { + if (CONFIG(DEBUG_SPI_FLASH)) { printk(BIOS_DEBUG, "SPI: read %8.8x from %4.4x\n", v, (((uint32_t) addr) & SPI_OFFSET_MASK)); } @@ -168,7 +168,7 @@ static uint32_t readl_(const void *addr) static void writeb_(uint8_t b, void *addr) { write8(addr, b); - if (IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)) { + if (CONFIG(DEBUG_SPI_FLASH)) { printk(BIOS_DEBUG, "SPI: wrote %2.2x to %4.4x\n", b, (((uint32_t) addr) & SPI_OFFSET_MASK)); } @@ -177,7 +177,7 @@ static void writeb_(uint8_t b, void *addr) static void writew_(uint16_t b, void *addr) { write16(addr, b); - if (IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)) { + if (CONFIG(DEBUG_SPI_FLASH)) { printk(BIOS_DEBUG, "SPI: wrote %4.4x to %4.4x\n", b, (((uint32_t) addr) & SPI_OFFSET_MASK)); } @@ -186,7 +186,7 @@ static void writew_(uint16_t b, void *addr) static void writel_(uint32_t b, void *addr) { write32(addr, b); - if (IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)) { + if (CONFIG(DEBUG_SPI_FLASH)) { printk(BIOS_DEBUG, "SPI: wrote %8.8x to %4.4x\n", b, (((uint32_t) addr) & SPI_OFFSET_MASK)); } |