diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-14 06:48:35 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-28 22:50:17 +0000 |
| commit | c48624ce1b49c2840def10cdcf197f3d9795cc19 (patch) | |
| tree | d5c36fce3755656b99107cc88151997ce56d013b /src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c | |
| parent | 3e7727908c3137442742a96079def34bb966faaf (diff) | |
intel/fsp_baytrail: Use smm_subregion()
Change-Id: I4e9de9c7f5decd784d881e5a733e995522be5226
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34757
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c')
| -rw-r--r-- | src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c index 48f0cdd755..c0b0998d42 100644 --- a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c +++ b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c @@ -29,7 +29,6 @@ #include <soc/pmc.h> #include <soc/acpi.h> #include <soc/iomap.h> -#include <soc/smm.h> /* Copy the default UPD region and settings to a buffer for modification */ static void GetUpdDefaultFromFsp (FSP_INFO_HEADER *FspInfo, UPD_DATA_REGION *UpdData) @@ -115,7 +114,7 @@ static void ConfigureDefaultUpdData(FSP_INFO_HEADER *FspInfo, UPD_DATA_REGION *U else if ((config->PcdeMMCBootMode != EMMC_USE_DEFAULT)) UpdData->PcdeMMCBootMode = config->PcdeMMCBootMode - EMMC_DISABLED; - UpdData->PcdMrcInitTsegSize = smm_region_size() >> 20; + UpdData->PcdMrcInitTsegSize = CONFIG_SMM_TSEG_SIZE >> 20; printk(FSP_INFO_LEVEL, "GTT Size:\t\t%d MB\n", UpdData->PcdGttSize); printk(FSP_INFO_LEVEL, "Tseg Size:\t\t%d MB\n", UpdData->PcdMrcInitTsegSize); |