diff options
author | Mohan D'Costa <mohan@ndr.co.jp> | 2014-09-18 15:57:06 +0900 |
---|---|---|
committer | Martin Roth <gaumless@gmail.com> | 2014-09-29 19:35:57 +0200 |
commit | ed0c83877f453b94a5e68bef62d6dbba1b97f0d2 (patch) | |
tree | c0c3ba635505da345f65840cb2270556e7f13c19 /src/soc/intel/fsp_baytrail/acpi | |
parent | bdae9bedcdf5650abee089564c47ecbf2ba70f79 (diff) |
intel/fsp_baytrail: Add S3 suspend/resume Support
This adds S3 Suspend / Resume support to Intel's Bay Trail FSP
It is based on the "src/soc/intel/baytrail/romstage/romstage.c"
implementation.
Change-Id: If0011068eb7290d1b764c5c4b12c17375fb69008
Signed-off-by: Mohan D'Costa <mohan@ndr.co.jp>
Reviewed-on: http://review.coreboot.org/6937
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/fsp_baytrail/acpi')
-rw-r--r-- | src/soc/intel/fsp_baytrail/acpi/sleepstates.asl | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/fsp_baytrail/acpi/sleepstates.asl b/src/soc/intel/fsp_baytrail/acpi/sleepstates.asl index 65339cc7a1..12e359a10d 100644 --- a/src/soc/intel/fsp_baytrail/acpi/sleepstates.asl +++ b/src/soc/intel/fsp_baytrail/acpi/sleepstates.asl @@ -21,5 +21,8 @@ Name(\_S0, Package(){0x0,0x0,0x0,0x0}) // Name(\_S1, Package(){0x1,0x1,0x0,0x0}) +#if CONFIG_HAVE_ACPI_RESUME +Name(\_S3, Package(){0x5,0x5,0x0,0x0}) +#endif Name(\_S4, Package(){0x6,0x6,0x0,0x0}) Name(\_S5, Package(){0x7,0x7,0x0,0x0}) |