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authorKayalvizhi Dhandapani <kayalvizhid@ami.com>2014-10-07 14:34:01 -0400
committerMarc Jones <marc.jones@se-eng.com>2014-10-09 21:59:45 +0200
commit454625c5cf4adecb5b80777503bc600c8b139004 (patch)
tree753330c0244e6419ab51e8e6c374293e471203d5 /src/soc/intel/fsp_baytrail/Kconfig
parent2c0f46afbbee078881ad9e9a99f5c219c2ed528e (diff)
intel/fsp_baytrail: Fix SMM/SMI
With SMM enabled the boot stopped while patching up global NVS in DSDT. The cause is that both CPUs are assigned the same SMBASE address. So update the "cpu_smm_do_relocation()" function so that each CPU gets a different SMBASE address Based on rmodule work that wasn't propagated to the FSP version: commit 3eb8eb7eba55cdfd64c8d50181ea066526ff6485 Change-Id: I77cd27d3a4f207411a689b5be572b4406a03f16b Signed-off-by: Kayalvizhi Dhandapani <kayalvizhid@ami.com> Reviewed-on: http://review.coreboot.org/7026 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Marc Jones <marc.jones@se-eng.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/fsp_baytrail/Kconfig')
-rw-r--r--src/soc/intel/fsp_baytrail/Kconfig4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/fsp_baytrail/Kconfig b/src/soc/intel/fsp_baytrail/Kconfig
index cb4757bca3..e9391c302b 100644
--- a/src/soc/intel/fsp_baytrail/Kconfig
+++ b/src/soc/intel/fsp_baytrail/Kconfig
@@ -31,12 +31,16 @@ config CPU_SPECIFIC_OPTIONS
select ARCH_ROMSTAGE_X86_32
select ARCH_RAMSTAGE_X86_32
select DYNAMIC_CBMEM
+ select HAVE_SMI_HANDLER
select HAVE_HARD_RESET
select MMCONF_SUPPORT
select MMCONF_SUPPORT_DEFAULT
select RELOCATABLE_MODULES
select PARALLEL_MP
select REG_SCRIPT
+ select SMM_MODULES
+ select SMM_TSEG
+ select BAYTRAIL_SMM
select SMP
select SPI_FLASH
select SSE2