From 454625c5cf4adecb5b80777503bc600c8b139004 Mon Sep 17 00:00:00 2001 From: Kayalvizhi Dhandapani Date: Tue, 7 Oct 2014 14:34:01 -0400 Subject: intel/fsp_baytrail: Fix SMM/SMI With SMM enabled the boot stopped while patching up global NVS in DSDT. The cause is that both CPUs are assigned the same SMBASE address. So update the "cpu_smm_do_relocation()" function so that each CPU gets a different SMBASE address Based on rmodule work that wasn't propagated to the FSP version: commit 3eb8eb7eba55cdfd64c8d50181ea066526ff6485 Change-Id: I77cd27d3a4f207411a689b5be572b4406a03f16b Signed-off-by: Kayalvizhi Dhandapani Reviewed-on: http://review.coreboot.org/7026 Reviewed-by: Paul Menzel Reviewed-by: Marc Jones Tested-by: build bot (Jenkins) --- src/soc/intel/fsp_baytrail/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/soc/intel/fsp_baytrail/Kconfig') diff --git a/src/soc/intel/fsp_baytrail/Kconfig b/src/soc/intel/fsp_baytrail/Kconfig index cb4757bca3..e9391c302b 100644 --- a/src/soc/intel/fsp_baytrail/Kconfig +++ b/src/soc/intel/fsp_baytrail/Kconfig @@ -31,12 +31,16 @@ config CPU_SPECIFIC_OPTIONS select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 select DYNAMIC_CBMEM + select HAVE_SMI_HANDLER select HAVE_HARD_RESET select MMCONF_SUPPORT select MMCONF_SUPPORT_DEFAULT select RELOCATABLE_MODULES select PARALLEL_MP select REG_SCRIPT + select SMM_MODULES + select SMM_TSEG + select BAYTRAIL_SMM select SMP select SPI_FLASH select SSE2 -- cgit v1.2.3