diff options
author | Sean Rhodes <sean@starlabs.systems> | 2021-07-13 13:36:28 +0100 |
---|---|---|
committer | Paul Fagerburg <pfagerburg@chromium.org> | 2021-08-03 15:21:04 +0000 |
commit | bc35bed18eba2526bc296cf12e972011bb85613d (patch) | |
tree | c2fb86bedeb40dc07bf27b716b00d8fd7147ad81 /src/soc/intel/elkhartlake | |
parent | c0308eb86068970dec906d01094fce43a4b58c16 (diff) |
soc/intel/*: Allow configuring 8254 timer via CMOS
Currently, the `USE_LEGACY_8254_TIMER` Kconfig option is the only way
to enable or disable the legacy 8254 timer. Add the `legacy_8254_timer`
CMOS option to allow enabling and disabling the 8254 timer without
having to rebuild and reflash coreboot. If options are not enabled or
the option is missing in cmos.layout, the Kconfig setting is used.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Ic82c7f25cdf6587de5c40f59441579cfc92ff2f1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56256
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/soc/intel/elkhartlake')
-rw-r--r-- | src/soc/intel/elkhartlake/fsp_params.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/soc/intel/elkhartlake/fsp_params.c b/src/soc/intel/elkhartlake/fsp_params.c index 31d987a568..ae9584c81b 100644 --- a/src/soc/intel/elkhartlake/fsp_params.c +++ b/src/soc/intel/elkhartlake/fsp_params.c @@ -5,6 +5,7 @@ #include <fsp/api.h> #include <fsp/ppi/mp_service_ppi.h> #include <fsp/util.h> +#include <option.h> #include <intelblocks/lpss.h> #include <intelblocks/pmclib.h> #include <intelblocks/xdci.h> @@ -14,6 +15,7 @@ #include <soc/ramstage.h> #include <soc/soc_chip.h> #include <string.h> +#include <types.h> /* SATA DEVSLP idle timeout default values */ #define DEF_DMVAL 15 @@ -159,7 +161,8 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->PavpEnable = 0; /* Legacy 8254 timer support */ - params->Enable8254ClockGating = !CONFIG(USE_LEGACY_8254_TIMER); + bool use_8254 = get_uint_option("legacy_8254_timer", CONFIG(USE_LEGACY_8254_TIMER)); + params->Enable8254ClockGating = !use_8254; params->Enable8254ClockGatingOnS3 = 1; /* PCH Master Gating Control */ |