diff options
| author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2023-05-05 10:08:45 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-05-10 13:06:12 +0000 |
| commit | 15e7499cdd7cd5e38fb27eaa9a5f42123fb8995a (patch) | |
| tree | 7f15e44d9f83926196ebed4bb8245a15f934e38a /src/soc/intel/elkhartlake | |
| parent | 20d658e53ca8694dedd5bfbdc70ce384feeea815 (diff) | |
soc/intel/elkhartlake: Make hard drive type for SATA ports configurable
Intel's EHL FSP offers the possibility to select the connected hard
drive type to SATA ports. One has the option to choose between HDD ('0'
- default) and SSD ('1').
This patch provides a chip config so that this FSP parameter can be set
as needed in the devicetree on mainboard level.
Change-Id: Idb03aff5b6c5df592b47e2f4abe4fe58ac7151ba
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74946
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/soc/intel/elkhartlake')
| -rw-r--r-- | src/soc/intel/elkhartlake/chip.h | 1 | ||||
| -rw-r--r-- | src/soc/intel/elkhartlake/fsp_params.c | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/elkhartlake/chip.h b/src/soc/intel/elkhartlake/chip.h index e8505f4a37..492a401eea 100644 --- a/src/soc/intel/elkhartlake/chip.h +++ b/src/soc/intel/elkhartlake/chip.h @@ -186,6 +186,7 @@ struct soc_intel_elkhartlake_config { uint8_t SataSalpSupport; uint8_t SataPortsEnable[CONFIG_MAX_SATA_PORTS]; uint8_t SataPortsDevSlp[CONFIG_MAX_SATA_PORTS]; + uint8_t SataPortsSSD[CONFIG_MAX_SATA_PORTS]; enum sata_speed_limit SataSpeed; /* * Enable(0)/Disable(1) SATA Power Optimizer on PCH side. diff --git a/src/soc/intel/elkhartlake/fsp_params.c b/src/soc/intel/elkhartlake/fsp_params.c index 1b667feb4e..a3213b151c 100644 --- a/src/soc/intel/elkhartlake/fsp_params.c +++ b/src/soc/intel/elkhartlake/fsp_params.c @@ -401,6 +401,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) for (i = 0; i < CONFIG_MAX_SATA_PORTS; i++) { params->SataPortsEnable[i] = config->SataPortsEnable[i]; params->SataPortsDevSlp[i] = config->SataPortsDevSlp[i]; + params->SataPortsSolidStateDrive[i] = config->SataPortsSSD[i]; if (config->SataPortsEnableDitoConfig[i]) { params->SataPortsDmVal[i] = config->SataPortsDmVal[i] ? : DEF_DMVAL; |