diff options
| author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2022-11-02 16:00:27 +0100 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2022-11-24 05:56:37 +0000 |
| commit | c16a7fc7179e0811a26bcfa44214f88f64793f04 (patch) | |
| tree | fb323e621f074d9676eb3f62a2c5f19fd185a935 /src/soc/intel/elkhartlake/include | |
| parent | 67f63e768d8860ebc6bae5987e2d928efabcf7c4 (diff) | |
soc/intel/ehl: Add MDIO operation to TSN GbE device
This patch refactors the MDIO access for the TSN GbE device by placing
the MDIO read and write functions into mdio_bus_operations struct which
is assigned to the .ops_mdio member of the PCI device struct. In this
way the MDIO interface of the TSN GbE device is exposed and can be used
by other drivers if needed.
Change-Id: I5d1b9dd2f2ba8c18291fff314c13f0c3851784aa
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69383
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/soc/intel/elkhartlake/include')
| -rw-r--r-- | src/soc/intel/elkhartlake/include/soc/tsn_gbe.h | 31 |
1 files changed, 13 insertions, 18 deletions
diff --git a/src/soc/intel/elkhartlake/include/soc/tsn_gbe.h b/src/soc/intel/elkhartlake/include/soc/tsn_gbe.h index cd9f12ee11..2b06b4cddf 100644 --- a/src/soc/intel/elkhartlake/include/soc/tsn_gbe.h +++ b/src/soc/intel/elkhartlake/include/soc/tsn_gbe.h @@ -3,23 +3,24 @@ #ifndef _SOC_ELKHARTLAKE_TSN_GBE_H_ #define _SOC_ELKHARTLAKE_TSN_GBE_H_ +#define GMII_TIMEOUT_MS 20 + +#define MAC_MDIO_ADR 0x200 /* MAC MDIO address register */ +#define MAC_MDIO_ADR_MASK 0x03FF7F0E +#define MAC_PHYAD(pa) (pa << 21) /* Physical Layer address */ +#define MAC_REGAD(rda) (rda << 16) /* Register/Device address */ +#define MAC_CLK_TRAIL_4 (4 << 12) /* 4 trailing clocks */ +#define MAC_CSR_CLK_DIV_102 (1 << 10) /* 100: CSR=150-250 MHz; CSR/102 */ +#define MAC_OP_CMD_WRITE (1 << 2) /* GMII Operation Command Write */ +#define MAC_OP_CMD_READ (3 << 2) /* GMII Operation Command Read */ +#define MAC_GMII_BUSY (1 << 0) /* GMII Busy bit */ +#define MAC_MDIO_DATA 0x204 /* MAC MDIO data register */ + #define MAC_ADDR_LEN 6 #define TSN_MAC_ADD0_HIGH 0x300 /* MAC Address0 High register */ #define TSN_MAC_ADD0_LOW 0x304 /* MAC Address0 Low register */ -#define TSN_GMII_TIMEOUT_MS 20 - -#define TSN_MAC_MDIO_ADR 0x200 /* MAC MDIO Address register */ -#define TSN_MAC_MDIO_ADR_MASK 0x03FF7F0E -#define TSN_MAC_PHYAD(pa) (pa << 21) /* Physical Layer Address */ -#define TSN_MAC_REGAD(rda) (rda << 16) /* Register/Device Address */ -#define TSN_MAC_CLK_TRAIL_4 (4 << 12) /* 4 Trailing Clocks */ -#define TSN_MAC_CSR_CLK_DIV_102 (1 << 10) /* 0100: CSR=150-250 MHz; CSR/102 */ -#define TSN_MAC_OP_CMD_WRITE (1 << 2) /* GMII Operation Command Write */ -#define TSN_MAC_OP_CMD_READ (3 << 2) /* GMII Operation Command Read */ -#define TSN_MAC_GMII_BUSY (1 << 0) /* GMII Busy bit */ - /* MDIO - Adhoc PHY Sublayer Register */ #define TSN_MAC_MDIO_ADHOC_ADR 0x15 /* Global Configuration Register */ @@ -27,14 +28,8 @@ /* PHY to MAC Interrupt Polarity bit */ #define TSN_MAC_PHY2MAC_INTR_POL (1 << 6) -#define TSN_MAC_MDIO_DATA 0x204 /* MAC MDIO Data register */ - /* We need one function we can call to get a MAC address to use. */ /* This function can be coded somewhere else but must exist. */ enum cb_err mainboard_get_mac_address(struct device *dev, uint8_t mac[MAC_ADDR_LEN]); -enum cb_err phy_gmii_ready(void *base); -uint16_t tsn_mdio_read(void *base, uint8_t phy_adr, uint8_t reg_adr); -void tsn_mdio_write(void *base, uint8_t phy_adr, uint8_t reg_adr, uint16_t data); - #endif /* _SOC_ELKHARTLAKE_TSN_GBE_H_ */ |