diff options
| author | Uwe Poeche <uwe.poeche@siemens.com> | 2022-03-30 08:51:59 +0200 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2022-05-23 07:17:21 +0000 |
| commit | 0ce586b1a44ac12563b1ac23b6612df862e520af (patch) | |
| tree | f06090acd2d7195bd81a91b9db1842a286af4978 /src/soc/intel/elkhartlake/include | |
| parent | ac040552fc865fe0c166818bf8902b0b0ea594c5 (diff) | |
soc/intel/elkhartlake/systemagent: Disable RAPL based on Kconfig
This patch provides the possibility for EHL based boards to disable
RAPL settings via SOC_INTEL_DISABLE_POWER_LIMITS config switch.
On Elkhart Lake the way via setting relevant MSR bits does not work.
Therefore the way via MCHBAR is choosen.
Test:
Check MCHBAR mapped registers (MCH_PKG_POWER_LIMIT) on mc_ehl1.
Change-Id: I5be6632b15ab8e14a21b5cd35152f82fec919d9f
Signed-off-by: Uwe Poeche <uwe.poeche@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63547
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/elkhartlake/include')
| -rw-r--r-- | src/soc/intel/elkhartlake/include/soc/systemagent.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/elkhartlake/include/soc/systemagent.h b/src/soc/intel/elkhartlake/include/soc/systemagent.h index 0abfbfcb07..c254d64fa9 100644 --- a/src/soc/intel/elkhartlake/include/soc/systemagent.h +++ b/src/soc/intel/elkhartlake/include/soc/systemagent.h @@ -21,7 +21,9 @@ #define VTBAR_MASK 0x7ffffff000ull #define MCH_PKG_POWER_LIMIT_LO 0x59a0 +#define PKG_PWR_LIM_1_EN (1 << 15) #define MCH_PKG_POWER_LIMIT_HI 0x59a4 +#define PKG_PWR_LIM_2_EN (1 << 15) #define MCH_DDR_POWER_LIMIT_LO 0x58e0 #define MCH_DDR_POWER_LIMIT_HI 0x58e4 |