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| author | Julien Viard de Galbert <jviarddegalbert@online.net> | 2018-03-07 15:28:15 +0100 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-11-20 00:43:58 +0000 |
| commit | c28f0e08024296b72f95f3475ff14ef22ccec046 (patch) | |
| tree | 44e92931cef1e3dfcc0d4110a6a64aff739d113f /src/soc/intel/denverton_ns | |
| parent | 3065157da825ee2389e05875f78178957ee9dd75 (diff) | |
mb/scaleway/tagada: GPIO on M.2 PCIe/SATA configure FSP HSIO lanes
Change-Id: Ic3ed97fc2b54d4974ec0b41b9f207fe3d49d2cce
Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/25436
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/denverton_ns')
0 files changed, 0 insertions, 0 deletions