diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-10-02 08:44:47 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-10-05 01:38:15 +0000 |
| commit | 4e6b7907de07c9c7d4b01a6213a8e13e946398cb (patch) | |
| tree | d6cb8f208a588506710e36a38d141d9228af7483 /src/soc/intel/denverton_ns | |
| parent | 19c0ae540ea992b76eb65421381269def0a6328d (diff) | |
src: Fix MSR_PKG_CST_CONFIG_CONTROL register name
Change-Id: I492224b6900b9658d54c8cf486ef5d64b299687f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28871
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Diffstat (limited to 'src/soc/intel/denverton_ns')
| -rw-r--r-- | src/soc/intel/denverton_ns/include/soc/msr.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/denverton_ns/include/soc/msr.h b/src/soc/intel/denverton_ns/include/soc/msr.h index 4d1ac70c3a..a2a42f178e 100644 --- a/src/soc/intel/denverton_ns/include/soc/msr.h +++ b/src/soc/intel/denverton_ns/include/soc/msr.h @@ -26,7 +26,7 @@ #define CPUID_SMX (1 << 6) #define MSR_PLATFORM_INFO 0xce #define PLATFORM_INFO_SET_TDP (1 << 29) -#define MSR_PMG_CST_CONFIG_CONTROL 0xe2 +#define MSR_PKG_CST_CONFIG_CONTROL 0xe2 #define MSR_PMG_IO_CAPTURE_BASE 0xe4 #define MSR_FEATURE_CONFIG 0x13c #define SMM_MCA_CAP_MSR 0x17d |