summaryrefslogtreecommitdiff
path: root/src/soc/intel/denverton_ns/xhci.c
diff options
context:
space:
mode:
authorAamir Bohra <aamir.bohra@intel.com>2018-10-09 20:33:16 +0530
committerSubrata Banik <subrata.banik@intel.com>2018-11-02 03:20:50 +0000
commit23012a0dff9810c9055369fb5f21e8ef5f074f7b (patch)
tree948b982d6f2ebbabeb0233d92cd2822b6b224b12 /src/soc/intel/denverton_ns/xhci.c
parent49e0510d57e47e8b6013afd6699d87bd4da9a693 (diff)
soc/intel/icelake: Allow coreboot to reserve stack for fsp
Change-Id: I5f2d9548b8e2c7b1d154b7bad126ec7b1052231a Signed-off-by: Subrata Banik <subrata.banik@intel.com> Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://review.coreboot.org/29317 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Shelley Chen <shchen@google.com>
Diffstat (limited to 'src/soc/intel/denverton_ns/xhci.c')
0 files changed, 0 insertions, 0 deletions