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| author | Subrata Banik <subrata.banik@intel.com> | 2021-06-09 22:19:04 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2021-06-24 07:54:46 +0000 |
| commit | b03cadf84b6da713553c0b7191134f2bc63b3e11 (patch) | |
| tree | 9714e5976158463d80c183de86d3a8ac44a4a269 /src/soc/intel/denverton_ns/tsc_freq.c | |
| parent | c0983c9e9b4af877770dd3acdae2c393b320089f (diff) | |
soc/intel/alderlake: Refactor soc_silicon_init_params function
This patch create separate helper functions to fill-in required
FSP-S UPDs as per IP initialization categories.
This would help to increase the code readability and in future
meaningful addition of FSP-S UPDs is possible rather adding UPDs randomly.
TEST=FSP-S UPD dump shows no change without and with this code change.
Change-Id: Iba51aebc74456449e24e51e2f309f14f951464a0
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55233
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/denverton_ns/tsc_freq.c')
0 files changed, 0 insertions, 0 deletions