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| author | Shuo Liu <shuo.liu@intel.com> | 2024-03-08 19:15:28 +0800 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-03-14 20:12:59 +0000 |
| commit | 6747acb9174f5090126d5e0789ebd403637cde97 (patch) | |
| tree | 5b731836b4f44828dd02584a33186fc4fe2e7129 /src/soc/intel/denverton_ns/tsc_freq.c | |
| parent | 07781e8268b3b3543e6fe15669aab029a45706e3 (diff) | |
soc/intel/xeon_sp: Rewrite acpi_create_drhd
Obtain IOMMU (Input/Output Memory Management Unit) info and
enumerate devices using device utils instead of FSP HOB interface,
which might change across SoC generations and no ambiguity across
multiple PCIe segments.
TEST=intel/archercity CRB
coreboot DRHD generation log no changes before and after
Change-Id: Ic5c404899172a0e4fba2721b8e8ca6c1f0856698
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81227
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/denverton_ns/tsc_freq.c')
0 files changed, 0 insertions, 0 deletions