diff options
| author | nick_xr_chen <nick_xr_chen@wistron.corp-partner.google.com> | 2020-09-22 10:56:43 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-09-28 09:31:18 +0000 |
| commit | d8279fdb6d65b381f019a2be95d926b26863b8f5 (patch) | |
| tree | 080d3493c75caf35cda3b51cb7eae863f566d372 /src/soc/intel/denverton_ns/lpc.c | |
| parent | 1bdbcd751028799105c4288e86d600d2d0aa9428 (diff) | |
mb/google/volteer: Improve Eldrid Port 1 USB2 Eye Diagram
In order to pass DB type-C USB2 eye diagram, DB USB2 PHY register needs
to be overridden.
port#1
PortUsb20Enable=1
Usb2PhyPetxiset=7
Usb2PhyTxiset=7
Usb2PhyPredeemp=3
Usb2PhyPehalfbit=0
BUG=b:169105751
Signed-off-by: nick_xr_chen <nick_xr_chen@wistron.corp-partner.google.com>
Change-Id: If076c644783fa2992ac062d6469f9c49e6d5ff24
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45598
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/denverton_ns/lpc.c')
0 files changed, 0 insertions, 0 deletions