diff options
author | Felix Singer <felix.singer@9elements.com> | 2019-11-22 00:10:20 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-02 19:13:10 +0000 |
commit | dbc90df35d814ad0d039793139c3e7e683ee0310 (patch) | |
tree | 4bda4d4b3985a67c4e1ff366efe53c8c5057d170 /src/soc/intel/denverton_ns/include | |
parent | c4a8c48b2f70d56c7c318f4ce24a467a1d708ef5 (diff) |
soc/intel/denverton: Move PCI IDs to pci_ids.h
This patch moves the PCI ID definitions to pci_ids.h file
and replaces every occurrence with the new names.
The resulting binary doesn't differ from the one
without this patch.
Used documents:
- Intel 337018
Change-Id: Ib7d2aae78c8877f3c9287d03b20a5620db293445
Signed-off-by: Felix Singer <felix.singer@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37120
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc/intel/denverton_ns/include')
-rw-r--r-- | src/soc/intel/denverton_ns/include/soc/pci_devs.h | 42 |
1 files changed, 0 insertions, 42 deletions
diff --git a/src/soc/intel/denverton_ns/include/soc/pci_devs.h b/src/soc/intel/denverton_ns/include/soc/pci_devs.h index faa4d927f5..a300fd4cd3 100644 --- a/src/soc/intel/denverton_ns/include/soc/pci_devs.h +++ b/src/soc/intel/denverton_ns/include/soc/pci_devs.h @@ -158,46 +158,4 @@ #define PCH_DEV_LPC _PCH_DEV(LPC, 0) #define PCH_DEV_SPI _PCH_DEV(LPC, 5) -#define SA_DEVID 0x1980 -#define SA_DEVID_DNVAD 0x1995 -#define SOC_DEVID SA_DEVID -#define RAS_DEVID 0x19a1 -#define RCEC_DEVID 0x19a2 -#define VRP2_DEVID 0x19a3 -#define PCIE_PORT1_DEVID 0x19a4 -#define PCIE_PORT2_DEVID 0x19a5 -#define PCIE_PORT3_DEVID 0x19a6 -#define PCIE_PORT4_DEVID 0x19a7 -#define PCIE_PORT5_DEVID 0x19a8 -#define PCIE_PORT6_DEVID 0x19a9 -#define PCIE_PORT7_DEVID 0x19aa -#define PCIE_PORT8_DEVID 0x19ab -#define SMBUS2_DEVID 0x19ac -#define AHCI_DEVID 0x19b2 -#define AHCI2_DEVID 0x19c2 -#define XHCI_DEVID 0x19d0 -#define VRP0_DEVID 0x19d1 -#define VRP1_DEVID 0x19d2 -#define ME_HECI1_DEVID 0x19d3 -#define ME_HECI2_DEVID 0x19d4 -#define ME_IEDR_DEVID 0x19ea -#define ME_MEKT_DEVID 0x19d5 -#define ME_HECI3_DEVID 0x19d6 -#define HSUART_DEVID 0x19d8 -#define HSUART1_DEVID HSUART_DEVID -#define HSUART2_DEVID HSUART_DEVID -#define HSUART3_DEVID HSUART_DEVID -#define IE_HECI1_DEVID 0x19e5 -#define IE_HECI2_DEVID 0x19e6 -#define IE_IEDR_DEVID 0x19e7 -#define IE_MEKT_DEVID 0x19e8 -#define IE_HECI3_DEVID 0x19e9 -#define MMC_DEVID 0x19db -#define LPC_DEVID 0x19dc -#define P2SB_DEVID 0x19dd -#define PMC_DEVID 0x19de -#define SMBUS_DEVID 0x19df -#define SPI_DEVID 0x19e0 -#define NPK_DEVID 0x19e1 - #endif /* _DENVERTON_NS_PCI_DEVS_H_ */ |