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| author | Mike Shih <mikeshih@msi.corp-partner.google.com> | 2022-12-14 16:02:50 +0800 |
|---|---|---|
| committer | Nick Vaccaro <nvaccaro@google.com> | 2023-01-04 00:48:17 +0000 |
| commit | 644b0f5f454eec6476de9dbd73aaf058e12c57c0 (patch) | |
| tree | df2e3a20877cf120d2de0c0c41d45c29e5bc5b80 /src/soc/intel/denverton_ns/hob_display.c | |
| parent | 7f5adef6342cfe9eae45e91c324350912e8604f3 (diff) | |
mb/google/brya/var/gaelin: Use RPL FSP headers
Select SOC_INTEL_RAPTORLAKE to force coreboot to use the RPL FSP headers
for FSP.
Since we use RPL FSP and it will support ADL as well, we rename
"Gaelin4ADL" to "Gaelin".
BUG=b:258603624
BRANCH=firmware-brya-14505.B
TEST=emerge-brask coreboot
Cq-Depend: chrome-internal:5227091, chromium:4113361
Change-Id: Ie7349f3670aeec166228e7df55300cd30d0ca16c
Signed-off-by: Mike Shih <mikeshih@msi.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70746
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Derek Huang <derekhuang@google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/soc/intel/denverton_ns/hob_display.c')
0 files changed, 0 insertions, 0 deletions