soc/intel/denverton_ns: Sanity check MMCONF_BASE_ADDRESS

According to received feedback, FSP-T enables MMCONF at address
0xe0000000 with 256 busses. Sanity-check that Kconfig matches that.

Add MMCONF_BUS_NUMBER such that MCFG in ACPI will be correct.

Change-Id: I01309638a9f4ada71e5e3789db34892ed4abfa3b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50665
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

1 files changed, 4 insertions, 13 deletions

diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c
index 569e61d9de..921cbc9cf6 100644
--- a/src/soc/intel/denverton_ns/acpi.c
+++ b/src/soc/intel/denverton_ns/acpi.c
@@ -83,19 +83,10 @@ acpi_cstate_t *soc_get_cstate_map(size_t *entries)
 
 unsigned long acpi_fill_mcfg(unsigned long current)
 {
-	u32 pciexbar_reg;
-	int max_buses;
-
-	pciexbar_reg = get_pciebase();
-	max_buses = get_pcielength();
-
-	if (!pciexbar_reg)
-		return current;
-
-	current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current,
-					     pciexbar_reg, 0x0, 0x0,
-					     (u8)(max_buses - 1));
-
+	/* PCI Segment Group 0, Start Bus Number 0, End Bus Number is 255 */
+	current += acpi_create_mcfg_mmconfig((void *)current,
+					     CONFIG_MMCONF_BASE_ADDRESS, 0, 0,
+					     CONFIG_MMCONF_BUS_NUMBER - 1);
 	return current;
 }