diff options
author | Subrata Banik <subratabanik@google.com> | 2022-01-26 01:42:18 +0530 |
---|---|---|
committer | Subrata Banik <subratabanik@google.com> | 2022-01-27 10:47:26 +0000 |
commit | d87b0c371eaebafab4fbf925178cb47480d8b0df (patch) | |
tree | 66d914c338de8c6dde5c60e15482bcc1b5a3ba52 /src/soc/intel/common | |
parent | 96eb676b5ebaa482e0618a4dcf764e0d1d0d3af1 (diff) |
soc/intel/common/cse: Drop CSE library usage in bootblock
This patch drops the CSE common code block from getting compiled
in bootblock without any SoC code using heci communication so
early in the boot flow.
BUG=none
TEST=Able to build brya, purism/librem_skl without any compilation issue.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ib4d221c6f19b60aeaf64696e64d0c4209dbf14e7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61382
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r-- | src/soc/intel/common/block/cse/Makefile.inc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/cse/Makefile.inc b/src/soc/intel/common/block/cse/Makefile.inc index 3f4c4d62ab..0e5dcdabf2 100644 --- a/src/soc/intel/common/block/cse/Makefile.inc +++ b/src/soc/intel/common/block/cse/Makefile.inc @@ -1,4 +1,3 @@ -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += cse.c romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += cse.c ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += cse.c romstage-$(CONFIG_SOC_INTEL_CSE_LITE_SKU) += cse_lite.c |