diff options
author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2023-07-03 17:17:32 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2023-07-12 13:53:40 +0000 |
commit | d54a5b294ff3fe7a8b27f71b5fb3da2d2d0057b1 (patch) | |
tree | a66b4b60cfc02450c8ba2168932c690abdf54f64 /src/soc/intel/common | |
parent | 573e6ded9f0cc0119c90dbe849480b1a2974773e (diff) |
treewide: Drop the suffixes from ADL and RPL CPUID macros and strings
CPUID is the same for Alder Lake and Raptor Lake S and HX variants.
To reduce the confusion and concerns how to name the macros, remove
the suffixes from macros and platform reporting strings. Thankfully
the stepping names are unique across mobile (P suffixed) and desktop
(S and HX suffixed) SKUs. Distinguishing the S from HX is possible via
host bridge PCI ID.
Change-Id: Ib08fb0923481541dd6f358cf60da44d90bd75ae2
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76203
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Crawford <tcrawford@system76.com>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r-- | src/soc/intel/common/block/cpu/mp_init.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c index 3d6d6063a4..f38db875d6 100644 --- a/src/soc/intel/common/block/cpu/mp_init.c +++ b/src/soc/intel/common/block/cpu/mp_init.c @@ -74,19 +74,19 @@ static const struct cpu_device_id cpu_table[] = { { X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_A0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_B0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_JASPERLAKE_A0, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_INTEL, CPUID_ALDERLAKE_S_A0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_ALDERLAKE_A0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_ALDERLAKE_J0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_ALDERLAKE_K0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_ALDERLAKE_L0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_ALDERLAKE_Q0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_ALDERLAKE_R0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_ALDERLAKE_N_A0, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_P_J0, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_P_Q0, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_S_A0, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_S_B0, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_S_C0, CPUID_EXACT_MATCH_MASK }, - { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_S_H0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_J0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_Q0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_A0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_B0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_C0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_H0, CPUID_EXACT_MATCH_MASK }, CPU_TABLE_END }; |