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authorMichael Niewöhner <foss@mniewoehner.de>2021-09-24 23:22:51 +0200
committerMichael Niewöhner <foss@mniewoehner.de>2021-10-17 14:00:10 +0000
commitc9a12f2402bb9151f8a0643d98bb6915bf06531e (patch)
treeb6b81e08d39bb3330a849469eaa56a4554575ddd /src/soc/intel/common
parent413810e55ff307d998ace4e16145ab71e939e85a (diff)
soc/intel/{common,apl,glk}: guard PM Timer option on SoCs w/o PM Timer
Apollo Lake and Gemini Lake do not have a hardware PM ACPI timer but only uCode PM Timer emulation. Add a Kconfig `NO_PM_ACPI_TIMER` denoting SoCs without PM Timer and make it mutually exclusive with the Kconfig `USE_PM_ACPI_TIMER`. This is partly redundant to `PM_ACPI_TIMER_OPTIONAL`, which will be dropped in the follow-up change, though. Change-Id: Ic323bbfb7089c53a6f22724910a0ff3df8904ebd Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57931 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r--src/soc/intel/common/block/pmc/Kconfig6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/pmc/Kconfig b/src/soc/intel/common/block/pmc/Kconfig
index f60dc69692..6ec9339806 100644
--- a/src/soc/intel/common/block/pmc/Kconfig
+++ b/src/soc/intel/common/block/pmc/Kconfig
@@ -50,6 +50,11 @@ config PMC_GLOBAL_RESET_ENABLE_LOCK
Note that the reset register is still at 0xCF9 this only
controls the enable and lock feature.
+config NO_PM_ACPI_TIMER
+ bool
+ help
+ Selected by SoCs that do not have a PM ACPI timer.
+
config PM_ACPI_TIMER_OPTIONAL
bool
default n
@@ -62,6 +67,7 @@ if PM_ACPI_TIMER_OPTIONAL
config USE_PM_ACPI_TIMER
bool "Enable ACPI PM timer"
default y
+ depends on !NO_PM_ACPI_TIMER
help
This should be disabled for devices running on battery since
it can draw much power. Further, it must be disabled, if S0ix