diff options
author | Angel Pons <th3fanbus@gmail.com> | 2021-02-19 19:42:10 +0100 |
---|---|---|
committer | Angel Pons <th3fanbus@gmail.com> | 2021-03-01 19:37:56 +0000 |
commit | 98f672a5ea793a86e0f66317893a3706fbd66102 (patch) | |
tree | eec3a9a25d8c8079cb17c45f58a4103ff0b87e57 /src/soc/intel/common | |
parent | 6bd99f9ada29f199f9bf50f1cd6b37e24ee1eb7b (diff) |
soc/intel: Factor out identical acpigen GPIO helpers
Change-Id: I27f198d403f6ba05ba72ae0652da224d4cbf323a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50938
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r-- | src/soc/intel/common/block/acpi/Kconfig | 3 | ||||
-rw-r--r-- | src/soc/intel/common/block/acpi/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/common/block/acpi/gpio.c | 40 |
3 files changed, 44 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/acpi/Kconfig b/src/soc/intel/common/block/acpi/Kconfig index 8912ff3105..6aa3abcad9 100644 --- a/src/soc/intel/common/block/acpi/Kconfig +++ b/src/soc/intel/common/block/acpi/Kconfig @@ -5,6 +5,9 @@ config SOC_INTEL_COMMON_BLOCK_ACPI help Intel Processor common code for ACPI +config SOC_INTEL_COMMON_BLOCK_ACPI_GPIO + bool + config SOC_INTEL_COMMON_BLOCK_ACPI_LPIT bool depends on HAVE_ACPI_TABLES diff --git a/src/soc/intel/common/block/acpi/Makefile.inc b/src/soc/intel/common/block/acpi/Makefile.inc index 89565a6fd9..c78dbc0d84 100644 --- a/src/soc/intel/common/block/acpi/Makefile.inc +++ b/src/soc/intel/common/block/acpi/Makefile.inc @@ -1,4 +1,5 @@ ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI) += acpi.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO) += gpio.c ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT) += lpit.c ramstage-$(CONFIG_ACPI_BERT) += acpi_bert.c ramstage-$(CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE) += acpi_wake_source.c diff --git a/src/soc/intel/common/block/acpi/gpio.c b/src/soc/intel/common/block/acpi/gpio.c new file mode 100644 index 0000000000..99847c52aa --- /dev/null +++ b/src/soc/intel/common/block/acpi/gpio.c @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpigen.h> + +static int acpigen_soc_gpio_op(const char *op, unsigned int gpio_num) +{ + /* op (gpio_num) */ + acpigen_emit_namestring(op); + acpigen_write_integer(gpio_num); + return 0; +} + +static int acpigen_soc_get_gpio_state(const char *op, unsigned int gpio_num) +{ + /* Store (op (gpio_num), Local0) */ + acpigen_write_store(); + acpigen_soc_gpio_op(op, gpio_num); + acpigen_emit_byte(LOCAL0_OP); + return 0; +} + +int acpigen_soc_read_rx_gpio(unsigned int gpio_num) +{ + return acpigen_soc_get_gpio_state("\\_SB.PCI0.GRXS", gpio_num); +} + +int acpigen_soc_get_tx_gpio(unsigned int gpio_num) +{ + return acpigen_soc_get_gpio_state("\\_SB.PCI0.GTXS", gpio_num); +} + +int acpigen_soc_set_tx_gpio(unsigned int gpio_num) +{ + return acpigen_soc_gpio_op("\\_SB.PCI0.STXS", gpio_num); +} + +int acpigen_soc_clear_tx_gpio(unsigned int gpio_num) +{ + return acpigen_soc_gpio_op("\\_SB.PCI0.CTXS", gpio_num); +} |