diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2020-09-29 14:36:40 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-10-03 04:19:00 +0000 |
| commit | 8971ccd576a7b0edbd02101b0c3bc3541cb6a741 (patch) | |
| tree | 6b1d3ac94497ad7a35428cccd8504342bef7b94f /src/soc/intel/common | |
| parent | 78463a7d26506d6e38917e9bf98ac0dd82663565 (diff) | |
soc/intel: Move pch_misc_init() to common code
List of changes:
1. Move pch_misc_init() into common block code.
2. Remove redundant LPC functions from SoC directory and
refer from block/lpc directory.
3. Create macros for IO port 0x61 and 0x70 as applicable.
TEST=Able to build and boot hatch and tglrvp platform without seeing
any functional impact.
Change-Id: Ie36ee63869c076d251ccfa5409001d18f22600d7
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45789
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/common')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/lpc_lib.h | 6 | ||||
| -rw-r--r-- | src/soc/intel/common/block/lpc/lpc_lib.c | 18 |
2 files changed, 24 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/lpc_lib.h b/src/soc/intel/common/block/include/intelblocks/lpc_lib.h index 52b0ff8e72..b04df76844 100644 --- a/src/soc/intel/common/block/include/intelblocks/lpc_lib.h +++ b/src/soc/intel/common/block/include/intelblocks/lpc_lib.h @@ -109,5 +109,11 @@ void pch_lpc_add_new_resource(struct device *dev, uint8_t offset, void pch_enable_ioapic(void); /* Retrieve and setup PCH LPC interrupt routing. */ void pch_pirq_init(void); +/* + * LPC MISC programming + * 1. Setup NMI on errors, disable SERR + * 2. Disable NMI sources + */ +void pch_misc_init(void); #endif /* _SOC_COMMON_BLOCK_LPC_LIB_H_ */ diff --git a/src/soc/intel/common/block/lpc/lpc_lib.c b/src/soc/intel/common/block/lpc/lpc_lib.c index d189a5e398..67dd661460 100644 --- a/src/soc/intel/common/block/lpc/lpc_lib.c +++ b/src/soc/intel/common/block/lpc/lpc_lib.c @@ -386,3 +386,21 @@ void pch_pirq_init(void) pci_write_config8(PCI_BDF(irq_dev), PCI_INTERRUPT_LINE, int_line); } } + +#define PPI_PORT_B 0x61 +#define SERR_DIS (1 << 2) +#define CMOS_NMI 0x70 +#define NMI_DIS (1 << 7) + +/* LPC MISC programming */ +void pch_misc_init(void) +{ + uint8_t reg8; + + /* Setup NMI on errors, disable SERR */ + reg8 = (inb(PPI_PORT_B)) & 0xf0; + outb((reg8 | SERR_DIS), PPI_PORT_B); + + /* Disable NMI sources */ + outb(NMI_DIS, CMOS_NMI); +} |