soc/intel/alderlake/romstage: Refactor soc_memory_init_params function

This patch create separate helper functions to fill-in required
FSP-M UPDs as per IP initialization categories.

This would help to increase the code readability and in future
meaningful addition of FSP-M UPDs is possible rather adding UPDs randomly.

TEST=FSP-M UPD dump shows no change without and with this code change.

Change-Id: I5f23292fd1bd44d0cd55fbefd490b090ccd48365
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55225
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

0 files changed, 0 insertions, 0 deletions