summaryrefslogtreecommitdiff
path: root/src/soc/intel/common
diff options
context:
space:
mode:
authorArthur Heymans <arthur@aheymans.xyz>2020-10-28 14:03:14 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-11-02 06:16:37 +0000
commit5a6633491158c919a5f9e0e8cf627facb3fe890e (patch)
treeb3ecab4c88d808883abf1e277d193cbd32940dbf /src/soc/intel/common
parentd7388d13f7aa50bc63114c7c4c12f761ed384cdd (diff)
drivers/intel/fsp2_0: Add function to report FSP-T output
This allows to compare the FSP-T output in %ecx and %edx to coreboot's CAR symbols: Change-Id: I8d79f97f8c12c63ce215935353717855442a8290 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46884 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r--src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S b/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
index b9daf08b2f..e77b841612 100644
--- a/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
+++ b/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
@@ -72,6 +72,13 @@ CAR_init_done:
/* Setup bootblock stack */
mov %edx, %esp
+ /*
+ * temp_memory_start/end reside in the .bss section, which gets cleared
+ * below. Save the FSP return value to the stack before writing those
+ * variables.
+ */
+ push %ecx
+ push %edx
/* clear .bss section as it is not shared */
cld
@@ -82,6 +89,11 @@ CAR_init_done:
shrl $2, %ecx
rep stosl
+ pop %edx
+ movl %edx, temp_memory_end
+ pop %ecx
+ movl %ecx, temp_memory_start
+
/* Restore the timestamp from bootblock_crt0.S (ebp:mm1) */
push %ebp
movd %mm1, %eax