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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-01-15 05:58:42 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-02-16 09:28:42 +0000
commit4de1a31cb04f0363b6d257d9de392cdfe8d5644c (patch)
tree80a674e5d82d33c5e133d31676ab48bad409798e /src/soc/intel/common
parentcdd2f63947549e9b478f26942daf400cf4f246e6 (diff)
ACPI: Add acpi_reset_gnvs_for_wake()
With chipset_power_state filled in romstage CBMEM hooks and GNVS allocated early in ramstage, GNVS wake source is now also filled for normal boot path. Change-Id: I2d44770392d14d2d6e22cc98df9d1751c8717ff3 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50004 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r--src/soc/intel/common/block/acpi/acpi_wake_source.c39
1 files changed, 14 insertions, 25 deletions
diff --git a/src/soc/intel/common/block/acpi/acpi_wake_source.c b/src/soc/intel/common/block/acpi/acpi_wake_source.c
index 3ffcac813b..710ccf5302 100644
--- a/src/soc/intel/common/block/acpi/acpi_wake_source.c
+++ b/src/soc/intel/common/block/acpi/acpi_wake_source.c
@@ -14,7 +14,7 @@
static void pm_fill_gnvs(struct global_nvs *gnvs, const struct chipset_power_state *ps)
{
uint32_t pm1, *gpe0;
- int gpe_reg, gpe_reg_count;
+ int index, gpe_reg, gpe_reg_count;
int reg_size = sizeof(uint32_t) * 8;
gpe_reg_count = soc_fill_acpi_wake(ps, &pm1, &gpe0);
@@ -22,15 +22,14 @@ static void pm_fill_gnvs(struct global_nvs *gnvs, const struct chipset_power_sta
return;
/* Scan for first set bit in PM1 */
- for (gnvs->pm1i = 0; gnvs->pm1i < reg_size; gnvs->pm1i++) {
+ for (index = 0; index < reg_size; index++) {
if (pm1 & 1)
break;
pm1 >>= 1;
}
- /* If unable to determine then return -1 */
- if (gnvs->pm1i >= 16)
- gnvs->pm1i = -1;
+ if (index < 16)
+ gnvs->pm1i = index;
/* Scan for first set bit in GPE registers */
for (gpe_reg = 0; gpe_reg < gpe_reg_count; gpe_reg++) {
@@ -38,41 +37,31 @@ static void pm_fill_gnvs(struct global_nvs *gnvs, const struct chipset_power_sta
int start = gpe_reg * reg_size;
int end = start + reg_size;
- if (gpe == 0) {
- if (!gnvs->gpei)
- gnvs->gpei = end;
- continue;
- }
-
- for (gnvs->gpei = start; gnvs->gpei < end; gnvs->gpei++) {
+ for (index = start; index < end; index++) {
if (gpe & 1)
break;
gpe >>= 1;
}
}
- /* If unable to determine then return -1 */
- if (gnvs->gpei >= gpe_reg_count * reg_size)
- gnvs->gpei = -1;
-
- printk(BIOS_DEBUG, "ACPI _SWS is PM1 Index %lld GPE Index %lld\n",
- (long long)gnvs->pm1i, (long long)gnvs->gpei);
+ if (index < gpe_reg_count * reg_size)
+ gnvs->gpei = index;
}
static void acpi_save_wake_source(void *unused)
{
const struct chipset_power_state *ps;
- struct global_nvs *gnvs = acpi_get_gnvs();
- if (!gnvs)
- return;
-
- gnvs->pm1i = -1;
- gnvs->gpei = -1;
+ struct global_nvs *gnvs;
+ if (acpi_reset_gnvs_for_wake(&gnvs) < 0)
+ return;
if (acpi_pm_state_for_wake(&ps) < 0)
return;
pm_fill_gnvs(gnvs, ps);
+
+ printk(BIOS_DEBUG, "ACPI _SWS is PM1 Index %lld GPE Index %lld\n",
+ (long long)gnvs->pm1i, (long long)gnvs->gpei);
}
-BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, acpi_save_wake_source, NULL);
+BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, acpi_save_wake_source, NULL);