diff options
author | Subrata Banik <subrata.banik@intel.com> | 2019-07-08 14:49:22 +0530 |
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committer | Subrata Banik <subrata.banik@intel.com> | 2019-07-11 05:57:41 +0000 |
commit | 10a9432cc2ad77234442bd639194c5a80050854e (patch) | |
tree | ce6f68feab9582d2ab62765cd0d9a3262bb62b69 /src/soc/intel/common | |
parent | 5b9948140f97eceb47ba026d7bad6dfa2a3c483d (diff) |
soc/intel/common/timer: Move USE_LEGACY_8254_TIMER into common/block/timer
This patch moves USE_LEGACY_8254_TIMER Kconfig into common/block/timer
for better code sharing. Also ported CB:33512 for SPT and ICP PCH.
Change-Id: Ic767ff97aaa3eb7fa35ffa38fa416d006eaa6e78
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34132
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r-- | src/soc/intel/common/block/timer/Kconfig | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/timer/Kconfig b/src/soc/intel/common/block/timer/Kconfig index a4150459aa..a214ef016b 100644 --- a/src/soc/intel/common/block/timer/Kconfig +++ b/src/soc/intel/common/block/timer/Kconfig @@ -2,3 +2,13 @@ config SOC_INTEL_COMMON_BLOCK_TIMER bool help Intel Processor common TIMER support + +config USE_LEGACY_8254_TIMER + bool "Use Legacy 8254 Timer" + default y if PAYLOAD_SEABIOS || VGA_ROM_RUN + default n + help + This sets the FSP UPD to enable Legacy 8254 clock gating. As per + the FSP Integration guide Legacy 8254 timer clock gating UPD needs + to be disabled in order to boot SeaBIOS or run OpRom, + but should otherwise be enabled. |