diff options
| author | Musse Abdullahi <musse.abdullahi@intel.com> | 2023-06-27 11:14:09 -0700 |
|---|---|---|
| committer | Matt DeVillier <matt.devillier@amd.corp-partner.google.com> | 2023-06-29 17:08:17 +0000 |
| commit | 08545aa302a18342ee87c8fe3d05f7007e49df7d (patch) | |
| tree | 068d99f6a339ae5182e64dca6c40f192736375b9 /src/soc/intel/common | |
| parent | bf557e0d4328703eccba07e52ac620b60083191e (diff) | |
soc/intel/meteorlake: Add QS(C0) stepping CPU ID
This patch adds CPU ID for C0 stepping (aka QS).
DOC=#723567
TEST=Able to boot on C0 rvp (and rex) and get correct CPU Name in coreboot log.
Change-Id: I53e3b197f2a0090e178877c1eef783b41670ca83
Signed-off-by: Musse Abdullahi <musse.abdullahi@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76135
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common')
| -rw-r--r-- | src/soc/intel/common/block/cpu/mp_init.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c index 7466ff6851..dfb4a04ee7 100644 --- a/src/soc/intel/common/block/cpu/mp_init.c +++ b/src/soc/intel/common/block/cpu/mp_init.c @@ -35,6 +35,7 @@ static const struct cpu_device_id cpu_table[] = { { X86_VENDOR_INTEL, CPUID_METEORLAKE_A0_1, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_METEORLAKE_A0_2, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_METEORLAKE_B0, CPUID_EXACT_MATCH_MASK }, + { X86_VENDOR_INTEL, CPUID_METEORLAKE_C0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_SKYLAKE_C0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_SKYLAKE_D0, CPUID_EXACT_MATCH_MASK }, { X86_VENDOR_INTEL, CPUID_SKYLAKE_HQ0, CPUID_EXACT_MATCH_MASK }, |