diff options
| author | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2022-06-15 22:44:06 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-17 19:47:11 +0000 |
| commit | 044817762be7fd731ad1688cf5d844958b7067e7 (patch) | |
| tree | 9565e562d021582aec9c191ba0fc5d86082e0ad4 /src/soc/intel/common | |
| parent | b404fa474f9f28d3b8dd7e6aa5671eb05ef26ec8 (diff) | |
soc/intel/{alderlake, common}: Rename the pre_mem_ft structure
The patch renames identifiers (macros, function and structure names) in
the basecode/debug/debug_feature.c to generic names so that they can be
used to control the features which may have to be controlled either
during pre and post memory.
Currently, the naming of identifiers indicate that it meant to control
the features which can be controlled during only pre-memory phase.
TEST=Build code for Gimble
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: I53ceb25454027ab8a5c59400402beb6cc42884c9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65139
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/common')
| -rw-r--r-- | src/soc/intel/common/basecode/debug/debug_feature.c | 25 | ||||
| -rw-r--r-- | src/soc/intel/common/basecode/include/intelbasecode/debug_feature.h | 4 |
2 files changed, 15 insertions, 14 deletions
diff --git a/src/soc/intel/common/basecode/debug/debug_feature.c b/src/soc/intel/common/basecode/debug/debug_feature.c index df32e1dbf2..4b9a7cbf2e 100644 --- a/src/soc/intel/common/basecode/debug/debug_feature.c +++ b/src/soc/intel/common/basecode/debug/debug_feature.c @@ -5,32 +5,33 @@ #include <spi_flash.h> #define SI_DESC_OEM_SECTION_OFFSET 0xF00 -#define PRE_MEM_FEATURE_CTRL_OFFSET SI_DESC_OEM_SECTION_OFFSET -#define PRE_MEM_FEATURE_CTRL_SZ 64 +#define DEBUG_FEATURE_CTRL_OFFSET SI_DESC_OEM_SECTION_OFFSET +#define DEBUG_FEATURE_CTRL_SZ 64 #define SI_DESC_REGION_SZ 4096 -struct pre_mem_ft { +struct debug_feature_cntrl { uint8_t cse_fw_update_disable; /* Byte location: 0xF00 */ uint8_t reserved[63]; }; -static struct pre_mem_ft pre_mem_debug; +static struct debug_feature_cntrl dbg_feature_cntrl; -_Static_assert(sizeof(struct pre_mem_ft) % 64 == 0 && sizeof(struct pre_mem_ft) <= 256, - "sizeof(struct pre_mem_ft) must be a multiple of 64 bytes and up to 256 bytes"); +_Static_assert(sizeof(struct debug_feature_cntrl) % 64 == 0 + && sizeof(struct debug_feature_cntrl) <= 256, + "sizeof(struct debug_feature_cntrl) must be a multiple of 64 bytes and up to 256 bytes"); bool is_debug_cse_fw_update_disable(void) { - printk(BIOS_DEBUG, "rt_debug: pre_mem_debug.cse_fw_update_disable=%d\n", - pre_mem_debug.cse_fw_update_disable); + printk(BIOS_DEBUG, "rt_debug: dbg_feature_cntrl.cse_fw_update_disable=%d\n", + dbg_feature_cntrl.cse_fw_update_disable); - return pre_mem_debug.cse_fw_update_disable == 1; + return dbg_feature_cntrl.cse_fw_update_disable == 1; } -enum cb_err pre_mem_debug_init(void) +enum cb_err dbg_feature_cntrl_init(void) { - if (spi_flash_read(boot_device_spi_flash(), PRE_MEM_FEATURE_CTRL_OFFSET, - PRE_MEM_FEATURE_CTRL_SZ, &pre_mem_debug)) { + if (spi_flash_read(boot_device_spi_flash(), DEBUG_FEATURE_CTRL_OFFSET, + DEBUG_FEATURE_CTRL_SZ, &dbg_feature_cntrl)) { printk(BIOS_ERR, "Failed to read Descriptor Region from SPI Flash\n"); return CB_ERR; } diff --git a/src/soc/intel/common/basecode/include/intelbasecode/debug_feature.h b/src/soc/intel/common/basecode/include/intelbasecode/debug_feature.h index 664a739932..c8e23822d2 100644 --- a/src/soc/intel/common/basecode/include/intelbasecode/debug_feature.h +++ b/src/soc/intel/common/basecode/include/intelbasecode/debug_feature.h @@ -10,8 +10,8 @@ bool is_debug_cse_fw_update_disable(void); /* * Reads OEM Section area in the Descriptor Region and - * populates pre_mem_debug structure. + * populates debug_feature_cntrl structure. */ -enum cb_err pre_mem_debug_init(void); +enum cb_err dbg_feature_cntrl_init(void); #endif |