diff options
| author | Subrata Banik <subratabanik@google.com> | 2022-04-22 19:48:40 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-04-27 12:37:43 +0000 |
| commit | 2b594816eaa4629e549fcd2ca06f4395806ec78b (patch) | |
| tree | 28c7465dd00156d9f86055122df27311853bc9a1 /src/soc/intel/common/pch/lockdown | |
| parent | 0231ab17616ff519ef52b5b323fc1ce6efc79f61 (diff) | |
soc/intel/cmn/lockdown: Perform SA lockdown configuration
`sa_lockdown_cfg` function ensures locking the PAM register hence,
skip dedicated calling into `sa_lock_pam()` from the SoC
`finalize.c` file. Dropped sa_lock_pam() call from ADL/CNL/EHL/JSL
and TGL.
Additionally, this patch enforces SA lockdown configuration for SKL
and ICL as well.
BUG=b:211954778
TEST=Able to build google/brya with these changes.
> localhost ~ # lspci -xxx | less
00:00.0 Host bridge: Device 8086:4601 (rev 04)
Bit 0 for all PAM registers a.k.a, PAMx_0_0_0_PCI.LOCK bit is set
(meaning locked).
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ibd464d2507393ed0c746eb1fbd10e36092ed5599
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63518
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/soc/intel/common/pch/lockdown')
| -rw-r--r-- | src/soc/intel/common/pch/lockdown/lockdown.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/soc/intel/common/pch/lockdown/lockdown.c b/src/soc/intel/common/pch/lockdown/lockdown.c index d42b88060b..42f01bf6d3 100644 --- a/src/soc/intel/common/pch/lockdown/lockdown.c +++ b/src/soc/intel/common/pch/lockdown/lockdown.c @@ -5,6 +5,7 @@ #include <intelblocks/fast_spi.h> #include <intelblocks/lpc_lib.h> #include <intelblocks/pcr.h> +#include <intelblocks/systemagent.h> #include <intelpch/lockdown.h> #include <intelblocks/gpmr.h> #include <soc/pci_devs.h> @@ -107,6 +108,15 @@ static void lpc_lockdown_config(int chipset_lockdown) } } +static void sa_lockdown_config(int chipset_lockdown) +{ + if (!CONFIG(SOC_INTEL_COMMON_BLOCK_SA)) + return; + + if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) + sa_lock_pam(); +} + /* * platform_lockdown_config has 2 major part. * 1. Common SoC lockdown configuration. @@ -127,6 +137,9 @@ static void platform_lockdown_config(void *unused) /* GPMR lock down configuration */ gpmr_lockdown_cfg(); + /* SA lock down configuration */ + sa_lockdown_config(chipset_lockdown); + /* SoC lock down configuration */ soc_lockdown_config(chipset_lockdown); } |