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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-01-15 05:06:35 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-01-29 19:35:25 +0000
commitca71e135bc68f9817c48da6393625c2cf93a2637 (patch)
treeb49f2029fbda580375ae1c4ed5116333946a6f11 /src/soc/intel/common/block
parent816a41c904d1ba60ead3227bac83d5470f01c1ec (diff)
soc/intel: Remove duplicate call to acpi_wake_source()
With SOC_INTEL_COMMON_BLOCK_ACPI=y the call was made twice, possibly in the order: common/block/acpi.c: acpi_wake_source() common/acpi_wake_source.c: acpi_wake_source() In this order later call would reset pm1i and gpei in GNVS. Remove the implementation in block/acpi.c and rename existing acpi_wake_source.c to block/acpi_wake_source.c. Change-Id: I74fdae63111e3ea09000d888a918ebe70d711801 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49880 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block')
-rw-r--r--src/soc/intel/common/block/acpi/Makefile.inc1
-rw-r--r--src/soc/intel/common/block/acpi/acpi.c73
-rw-r--r--src/soc/intel/common/block/acpi/acpi_wake_source.c78
-rw-r--r--src/soc/intel/common/block/include/intelblocks/acpi_wake_source.h19
4 files changed, 100 insertions, 71 deletions
diff --git a/src/soc/intel/common/block/acpi/Makefile.inc b/src/soc/intel/common/block/acpi/Makefile.inc
index 4e3a323625..c605088dbe 100644
--- a/src/soc/intel/common/block/acpi/Makefile.inc
+++ b/src/soc/intel/common/block/acpi/Makefile.inc
@@ -1,2 +1,3 @@
ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI) += acpi.c
ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT) += lpit.c
+ramstage-$(CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE) += acpi_wake_source.c
diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c
index dc98b0d636..b36f2567f3 100644
--- a/src/soc/intel/common/block/acpi/acpi.c
+++ b/src/soc/intel/common/block/acpi/acpi.c
@@ -14,6 +14,7 @@
#include <cpu/intel/common/common.h>
#include <cpu/x86/smm.h>
#include <intelblocks/acpi.h>
+#include <intelblocks/acpi_wake_source.h>
#include <intelblocks/lpc_lib.h>
#include <intelblocks/pmclib.h>
#include <intelblocks/uart.h>
@@ -204,7 +205,7 @@ uint32_t acpi_fill_soc_wake(uint32_t generic_pm1_en,
* return the number of registers in the gpe0 array
*/
-static int acpi_fill_wake(const struct chipset_power_state *ps, uint32_t *pm1, uint32_t **gpe0)
+int soc_fill_acpi_wake(const struct chipset_power_state *ps, uint32_t *pm1, uint32_t **gpe0)
{
static uint32_t gpe0_sts[GPE0_REG_MAX];
uint32_t pm1_en;
@@ -438,73 +439,3 @@ void generate_cpu_entries(const struct device *device)
/* Add a method to notify processor nodes */
acpigen_write_processor_cnot(num_virt);
}
-
-/* Save wake source data for ACPI _SWS methods in NVS */
-static void pm_fill_gnvs(struct global_nvs *gnvs, const struct chipset_power_state *ps)
-{
- uint32_t pm1, *gpe0;
- int gpe_reg, gpe_reg_count;
- int reg_size = sizeof(uint32_t) * 8;
-
- gpe_reg_count = acpi_fill_wake(ps, &pm1, &gpe0);
- if (gpe_reg_count < 0)
- return;
-
- /* Scan for first set bit in PM1 */
- for (gnvs->pm1i = 0; gnvs->pm1i < reg_size; gnvs->pm1i++) {
- if (pm1 & 1)
- break;
- pm1 >>= 1;
- }
-
- /* If unable to determine then return -1 */
- if (gnvs->pm1i >= 16)
- gnvs->pm1i = -1;
-
- /* Scan for first set bit in GPE registers */
- for (gpe_reg = 0; gpe_reg < gpe_reg_count; gpe_reg++) {
- uint32_t gpe = gpe0[gpe_reg];
- int start = gpe_reg * reg_size;
- int end = start + reg_size;
-
- if (gpe == 0) {
- if (!gnvs->gpei)
- gnvs->gpei = end;
- continue;
- }
-
- for (gnvs->gpei = start; gnvs->gpei < end; gnvs->gpei++) {
- if (gpe & 1)
- break;
- gpe >>= 1;
- }
- }
-
- /* If unable to determine then return -1 */
- if (gnvs->gpei >= gpe_reg_count * reg_size)
- gnvs->gpei = -1;
-
- printk(BIOS_DEBUG, "ACPI _SWS is PM1 Index %lld GPE Index %lld\n",
- (long long)gnvs->pm1i, (long long)gnvs->gpei);
-}
-
-static void acpi_save_wake_source(void *unused)
-{
- if (!CONFIG(SOC_INTEL_COMMON_ACPI_WAKE_SOURCE))
- return;
-
- const struct chipset_power_state *ps;
- struct global_nvs *gnvs = acpi_get_gnvs();
- if (!gnvs)
- return;
-
- gnvs->pm1i = -1;
- gnvs->gpei = -1;
-
- if (acpi_pm_state_for_wake(&ps) < 0)
- return;
-
- pm_fill_gnvs(gnvs, ps);
-}
-
-BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, acpi_save_wake_source, NULL);
diff --git a/src/soc/intel/common/block/acpi/acpi_wake_source.c b/src/soc/intel/common/block/acpi/acpi_wake_source.c
new file mode 100644
index 0000000000..3ffcac813b
--- /dev/null
+++ b/src/soc/intel/common/block/acpi/acpi_wake_source.c
@@ -0,0 +1,78 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi.h>
+#include <acpi/acpi_gnvs.h>
+#include <acpi/acpi_pm.h>
+#include <bootstate.h>
+#include <console/console.h>
+#include <intelblocks/acpi_wake_source.h>
+#include <soc/nvs.h>
+#include <soc/pm.h>
+#include <stdint.h>
+
+/* Save wake source data for ACPI _SWS methods in NVS */
+static void pm_fill_gnvs(struct global_nvs *gnvs, const struct chipset_power_state *ps)
+{
+ uint32_t pm1, *gpe0;
+ int gpe_reg, gpe_reg_count;
+ int reg_size = sizeof(uint32_t) * 8;
+
+ gpe_reg_count = soc_fill_acpi_wake(ps, &pm1, &gpe0);
+ if (gpe_reg_count < 0)
+ return;
+
+ /* Scan for first set bit in PM1 */
+ for (gnvs->pm1i = 0; gnvs->pm1i < reg_size; gnvs->pm1i++) {
+ if (pm1 & 1)
+ break;
+ pm1 >>= 1;
+ }
+
+ /* If unable to determine then return -1 */
+ if (gnvs->pm1i >= 16)
+ gnvs->pm1i = -1;
+
+ /* Scan for first set bit in GPE registers */
+ for (gpe_reg = 0; gpe_reg < gpe_reg_count; gpe_reg++) {
+ uint32_t gpe = gpe0[gpe_reg];
+ int start = gpe_reg * reg_size;
+ int end = start + reg_size;
+
+ if (gpe == 0) {
+ if (!gnvs->gpei)
+ gnvs->gpei = end;
+ continue;
+ }
+
+ for (gnvs->gpei = start; gnvs->gpei < end; gnvs->gpei++) {
+ if (gpe & 1)
+ break;
+ gpe >>= 1;
+ }
+ }
+
+ /* If unable to determine then return -1 */
+ if (gnvs->gpei >= gpe_reg_count * reg_size)
+ gnvs->gpei = -1;
+
+ printk(BIOS_DEBUG, "ACPI _SWS is PM1 Index %lld GPE Index %lld\n",
+ (long long)gnvs->pm1i, (long long)gnvs->gpei);
+}
+
+static void acpi_save_wake_source(void *unused)
+{
+ const struct chipset_power_state *ps;
+ struct global_nvs *gnvs = acpi_get_gnvs();
+ if (!gnvs)
+ return;
+
+ gnvs->pm1i = -1;
+ gnvs->gpei = -1;
+
+ if (acpi_pm_state_for_wake(&ps) < 0)
+ return;
+
+ pm_fill_gnvs(gnvs, ps);
+}
+
+BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, acpi_save_wake_source, NULL);
diff --git a/src/soc/intel/common/block/include/intelblocks/acpi_wake_source.h b/src/soc/intel/common/block/include/intelblocks/acpi_wake_source.h
new file mode 100644
index 0000000000..efa0336f47
--- /dev/null
+++ b/src/soc/intel/common/block/include/intelblocks/acpi_wake_source.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef _INTEL_COMMON_ACPI_H_
+#define _INTEL_COMMON_ACPI_H_
+
+#include <stdint.h>
+
+/*
+ * SOC specific handler to provide the wake source data for ACPI _SWS.
+ *
+ * @pm1: PM1_STS register with only enabled events set
+ * @gpe0: GPE0_STS registers with only enabled events set
+ *
+ * return the number of registers in the gpe0 array or -1 if nothing
+ * is provided by this function.
+ */
+int soc_fill_acpi_wake(const struct chipset_power_state *ps, uint32_t *pm1, uint32_t **gpe0);
+
+#endif /* _INTEL_COMMON_ACPI_H_ */