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authorMichael Niewöhner <foss@mniewoehner.de>2020-11-23 15:42:49 +0100
committerMichael Niewöhner <foss@mniewoehner.de>2020-12-04 00:09:59 +0000
commitc3ab442cc1e1b36ae647eed6158ad10c9c93d3e6 (patch)
tree42971d0aafcdd17912323a09db53f1fc0ab62364 /src/soc/intel/common/block
parent6a62cc85e61da5282611c2bee5ac3a54580f0113 (diff)
intel/common/block/gpio: only reset configured SMI instead of all
Currently, when a SMI GPIO gets configured, the whole status register is get written back and thus, all SMIs get reset. Do it right and reset only the correspondig status bit of the GPIO to be configured. Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Change-Id: Iecf789d3009011381835959cb1c166f703f1c0cc Reviewed-on: https://review.coreboot.org/c/coreboot/+/48089 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block')
-rw-r--r--src/soc/intel/common/block/gpio/gpio.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/soc/intel/common/block/gpio/gpio.c b/src/soc/intel/common/block/gpio/gpio.c
index d6958b111f..0d21c8a8b6 100644
--- a/src/soc/intel/common/block/gpio/gpio.c
+++ b/src/soc/intel/common/block/gpio/gpio.c
@@ -154,9 +154,9 @@ static void gpio_configure_owner(const struct pad_config *cfg,
static void gpi_enable_smi(const struct pad_config *cfg,
const struct pad_community *comm)
{
- uint32_t value;
uint16_t sts_reg;
uint16_t en_reg;
+ uint32_t en_value;
int group;
int pin;
@@ -165,15 +165,15 @@ static void gpi_enable_smi(const struct pad_config *cfg,
pin = relative_pad_in_comm(comm, cfg->pad);
group = gpio_group_index(comm, pin);
-
sts_reg = GPI_SMI_STS_OFFSET(comm, group);
- value = pcr_read32(comm->port, sts_reg);
- /* Write back 1 to reset the sts bits */
- pcr_write32(comm->port, sts_reg, value);
+ en_reg = GPI_SMI_EN_OFFSET(comm, group);
+ en_value = gpio_bitmask_within_group(comm, pin);
+
+ /* Write back 1 to reset the sts bit */
+ pcr_rmw32(comm->port, sts_reg, en_value, 0);
/* Set enable bits */
- en_reg = GPI_SMI_EN_OFFSET(comm, group);
- pcr_or32(comm->port, en_reg, gpio_bitmask_within_group(comm, pin));
+ pcr_or32(comm->port, en_reg, en_value);
}
static void gpio_configure_itss(const struct pad_config *cfg, uint16_t port,