diff options
author | Pratikkumar Prajapati <pratikkumar.v.prajapati@intel.com> | 2022-12-29 09:58:48 -0800 |
---|---|---|
committer | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2023-01-06 19:19:34 +0000 |
commit | 63fcc4acc20116241b007fc5bb6d4e48925b277d (patch) | |
tree | cbade384143dee8cc0f9bcfdb407b3be79d9aa40 /src/soc/intel/common/block | |
parent | dd63dc1dc576f6f0a051a86c02fa62695b075b0c (diff) |
soc/intel/common: Check PRMRR dependent features
Add below mentioned functions:
is_sgx_configured_and_supported():
Checks if SGX is configured and supported
is_keylocker_configured_and_supported():
Checks if Key Locker is configured and supported
check_prm_features_enabled():
Checks if any of the features that need PRM are configured
and supported. As of now SGX and Key Locker are the only
features that need PRM.
Also, call check_prm_features_enabled() from get_valid_prmrr_size()
to make sure PRM dependent features are enabled and configured before
returning PRMRR size.
Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati@intel.com>
Change-Id: I51d3c144c410ce4c736f10e3759c7b7603ec3de9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71569
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Diffstat (limited to 'src/soc/intel/common/block')
-rw-r--r-- | src/soc/intel/common/block/cpu/cpulib.c | 68 |
1 files changed, 46 insertions, 22 deletions
diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c index 1f983255ce..072b2fd6c6 100644 --- a/src/soc/intel/common/block/cpu/cpulib.c +++ b/src/soc/intel/common/block/cpu/cpulib.c @@ -395,12 +395,58 @@ void cpu_lt_lock_memory(void) msr_set(MSR_LT_CONTROL, LT_CONTROL_LOCK); } +bool is_sgx_supported(void) +{ + struct cpuid_result cpuid_regs; + msr_t msr; + + /* EBX[2] is feature capability */ + cpuid_regs = cpuid_ext(CPUID_STRUCT_EXTENDED_FEATURE_FLAGS, 0x0); + msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */ + return ((cpuid_regs.ebx & SGX_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR)); +} + +static bool is_sgx_configured_and_supported(void) +{ + return CONFIG(SOC_INTEL_COMMON_BLOCK_SGX_ENABLE) && is_sgx_supported(); +} + +bool is_keylocker_supported(void) +{ + struct cpuid_result cpuid_regs; + msr_t msr; + + /* ECX[23] is feature capability */ + cpuid_regs = cpuid_ext(CPUID_STRUCT_EXTENDED_FEATURE_FLAGS, 0x0); + msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */ + return ((cpuid_regs.ecx & KEYLOCKER_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR)); +} + +static bool is_keylocker_configured_and_supported(void) +{ + return CONFIG(INTEL_KEYLOCKER) && is_keylocker_supported(); +} + +static bool check_prm_features_enabled(void) +{ + /* + * Key Locker and SGX are the features that need PRM. + * If either of them are enabled return true, otherwise false + * */ + return is_sgx_configured_and_supported() || + is_keylocker_configured_and_supported(); +} + int get_valid_prmrr_size(void) { msr_t msr; int i; int valid_size; + /* If none of the features that need PRM are enabled then return 0 */ + if (!check_prm_features_enabled()) + return 0; + if (!CONFIG(SOC_INTEL_COMMON_BLOCK_SGX_ENABLE)) return 0; @@ -523,25 +569,3 @@ unsigned int smbios_cpu_get_max_speed_mhz(void) { return cpu_get_max_turbo_ratio() * CONFIG_CPU_BCLK_MHZ; } - -bool is_sgx_supported(void) -{ - struct cpuid_result cpuid_regs; - msr_t msr; - - /* EBX[2] is feature capability */ - cpuid_regs = cpuid_ext(CPUID_STRUCT_EXTENDED_FEATURE_FLAGS, 0x0); - msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */ - return ((cpuid_regs.ebx & SGX_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR)); -} - -bool is_keylocker_supported(void) -{ - struct cpuid_result cpuid_regs; - msr_t msr; - - /* ECX[23] is feature capability */ - cpuid_regs = cpuid_ext(CPUID_STRUCT_EXTENDED_FEATURE_FLAGS, 0x0); - msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */ - return ((cpuid_regs.ecx & KEYLOCKER_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR)); -} |