diff options
| author | Nico Huber <nico.h@gmx.de> | 2022-08-06 19:11:55 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-09-15 13:07:11 +0000 |
| commit | 576861994ea5011c3a836a826b8189ef79c366cb (patch) | |
| tree | 1d5dc30e477587ce2188d1472804322929659dcf /src/soc/intel/common/block/xhci | |
| parent | c0fc38eed8f407d71f714f4d6fe2af0c3501ece4 (diff) | |
soc/intel/skylake: Assign device ops in chipset devicetree
Some PCI IDs were missing, and at least one (SPT's fast SPI
device in a generic SPI driver) was wrong. Hence, this patch
actually changes behavior depending on the devices actually
present in a machine.
In this patch the Skylake devicetree is written in a single-line
style. Alternative, the device operations could be put on a separate
line, e.g.
device pci 00.0 alias system_agent on
ops systemagent_ops
end
Tested on Kontron/bSL6. Notable in the log diff is that the
CSE and SATA drivers are hooked up now.
Change-Id: I8635fc53ca617b029d6fe1845eaef6c5c749db82
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66485
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/common/block/xhci')
| -rw-r--r-- | src/soc/intel/common/block/xhci/xhci.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/src/soc/intel/common/block/xhci/xhci.c b/src/soc/intel/common/block/xhci/xhci.c index a289061ba5..4a408343a6 100644 --- a/src/soc/intel/common/block/xhci/xhci.c +++ b/src/soc/intel/common/block/xhci/xhci.c @@ -117,7 +117,7 @@ void usb_xhci_disable_unused(bool (*ext_usb_xhci_en_cb)(unsigned int port_type, __weak void soc_xhci_init(struct device *dev) { /* no-op */ } -static struct device_operations usb_xhci_ops = { +struct device_operations usb_xhci_ops = { .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, @@ -134,11 +134,8 @@ static const unsigned short pci_device_ids[] = { PCI_DID_INTEL_APL_XHCI, PCI_DID_INTEL_CNL_LP_XHCI, PCI_DID_INTEL_GLK_XHCI, - PCI_DID_INTEL_SPT_LP_XHCI, - PCI_DID_INTEL_SPT_H_XHCI, PCI_DID_INTEL_LWB_XHCI, PCI_DID_INTEL_LWB_XHCI_SUPER, - PCI_DID_INTEL_UPT_H_XHCI, PCI_DID_INTEL_CNP_H_XHCI, PCI_DID_INTEL_ICP_LP_XHCI, PCI_DID_INTEL_CMP_LP_XHCI, |