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authorDuncan Laurie <dlaurie@google.com>2020-10-27 10:26:18 -0700
committerDuncan Laurie <dlaurie@chromium.org>2020-10-30 18:34:19 +0000
commit0f5a17e98092dd6f340582ede5d481e53f90a06c (patch)
tree9fedba91c13bf5ff689a0142613608009bca4667 /src/soc/intel/common/block/usb4/Kconfig
parent53b465d1c19502776853c236dbc7afb2c53f0c87 (diff)
soc/intel/common/block/usb4: Add TCSS XHCI driver for SSDT generation
In order to generate ACPI entries for USB devices attached to the USB4/TBT/TCSS/North XHCI device it needs to have a driver that will enumerate static devices on the bus. This driver does that and nothing else. BUG=b:151731851 TEST=boot on volteer and check for USB devices on \_SB.PCI0.TXHC.RHUB Signed-off-by: Duncan Laurie <dlaurie@google.com> Change-Id: I5a2ff1cd1bed557e793d45119232cf87032ddd7b Reviewed-on: https://review.coreboot.org/c/coreboot/+/46851 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/usb4/Kconfig')
-rw-r--r--src/soc/intel/common/block/usb4/Kconfig7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/usb4/Kconfig b/src/soc/intel/common/block/usb4/Kconfig
index be0b3782b0..fb876e1fd9 100644
--- a/src/soc/intel/common/block/usb4/Kconfig
+++ b/src/soc/intel/common/block/usb4/Kconfig
@@ -11,3 +11,10 @@ config SOC_INTEL_COMMON_BLOCK_USB4_PCIE
help
Chip driver for adding PCI ops and SSDT generation for common Intel
USB4/Thunderbolt root ports.
+
+config SOC_INTEL_COMMON_BLOCK_USB4_XHCI
+ bool
+ default n
+ help
+ Minimal PCI driver for adding PCI ops and SSDT generation for common
+ Intel USB4/Thunderbolt North XHCI ports.