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authorMichael Niewöhner <foss@mniewoehner.de>2020-12-21 03:46:58 +0100
committerMichael Niewöhner <foss@mniewoehner.de>2021-03-12 08:48:03 +0000
commit405f2296892c10a48db50cd66c2eb364cde0806e (patch)
tree407fdc4b2df309129ff377912560ffc371a36166 /src/soc/intel/common/block/uart/Kconfig
parent2b5892256c734634f1fcbfb1a31bab979f271c22 (diff)
soc/intel/*: drop UART pad configuration from common code
UART pad configuration should not be done in common code, because that may cause short circuits, when the user sets a wrong UART index. Since all boards do pad setup on their own now, finally drop the pad configuration from SoC common code. Change-Id: Id03719eb8bd0414083148471ed05dea62a895126 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48829 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lance Zhao
Diffstat (limited to 'src/soc/intel/common/block/uart/Kconfig')
-rw-r--r--src/soc/intel/common/block/uart/Kconfig2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/intel/common/block/uart/Kconfig b/src/soc/intel/common/block/uart/Kconfig
index 3437ec7477..7ba22b5c3e 100644
--- a/src/soc/intel/common/block/uart/Kconfig
+++ b/src/soc/intel/common/block/uart/Kconfig
@@ -13,7 +13,5 @@ config INTEL_LPSS_UART_FOR_CONSOLE
help
Selected by mainboards that use one of the SoC's LPSS UARTS
for the coreboot console.
- WARNING: UART_FOR_CONSOLE has to be set to a correct value,
- otherwise wrong pad configurations might be selected.
endif