diff options
author | Subrata Banik <subrata.banik@intel.com> | 2017-03-04 23:32:41 +0530 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-03-28 16:39:50 +0200 |
commit | 01ae11b057e4b15e1fde48c7845f7fbf66a4e948 (patch) | |
tree | b98863dcb2d5afae537e244048d25027b55f3c35 /src/soc/intel/common/block/systemagent/Kconfig | |
parent | 2ee54db24603f51738cbebd6d80c120f2b4db76d (diff) |
soc/intel/common/block: Add Intel common systemagent support
Create common Intel systemagent code.
This code currently contains the SA initialization
required in Bootblock phase, which has the following programming-
* Set PCIEXBAR
* Clear TSEG register
More code will get added up in the subsequent phases.
Change-Id: I6f0c515278f7fd04d407463a1eeb25ba13639f5c
Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/18565
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block/systemagent/Kconfig')
-rw-r--r-- | src/soc/intel/common/block/systemagent/Kconfig | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/systemagent/Kconfig b/src/soc/intel/common/block/systemagent/Kconfig new file mode 100644 index 0000000000..773a56b831 --- /dev/null +++ b/src/soc/intel/common/block/systemagent/Kconfig @@ -0,0 +1,26 @@ +config SOC_INTEL_COMMON_BLOCK_SA + bool + help + Intel Processor common System Agent support + +config MMCONF_BASE_ADDRESS + hex "PCI MMIO Base Address" + default 0xe0000000 + +config SA_PCIEX_LENGTH + hex + default 0x10000000 if (PCIEX_LENGTH_256MB) + default 0x8000000 if (PCIEX_LENGTH_128MB) + default 0x4000000 if (PCIEX_LENGTH_64MB) + default 0x10000000 + help + This option allows you to select length of PCIEX region. + +config PCIEX_LENGTH_256MB + bool "256MB" + +config PCIEX_LENGTH_128MB + bool "128MB" + +config PCIEX_LENGTH_64MB + bool "64MB" |