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authorSubrata Banik <subratabanik@google.com>2024-06-18 13:16:44 +0000
committerSubrata Banik <subratabanik@google.com>2024-06-21 03:20:56 +0000
commit2a84b8334970fb22b4b32ff0d638092fc81fbc12 (patch)
treedb152fbcdcf077c799ce6b2fb69eb889f86177a2 /src/soc/intel/common/block/sram/Kconfig
parent6fc8bd9a7b238ac9d9c83a86226e668659514235 (diff)
soc/intel/cmn/acpi: Add support for `PCR_BASE_ADDRESS` above 4 GiB
This change updates the Northbridge ASL to conditionally include a QWordMemory resource for `SM01` when the `CONFIG_PCR_BASE_ADDRESS` is above 4 GiB. If `CONFIG_PCR_BASE_ADDRESS` is below 4 GiB, or falls within the PCH reserved range, the existing handling of `SM01` remains unchanged (as a DWordMemory resource). TEST=Built with CONFIG_PCR_BASE_ADDRESS both above and below 4 GiB, verified ASL output. Change-Id: I9547377cdea6cb4334ab59b3bc837059fbb22e3b Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83112 Reviewed-by: Cliff Huang <cliff.huang@intel.com> Reviewed-by: Hannah Williams <hannah.williams@intel.com> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/sram/Kconfig')
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