diff options
author | Subrata Banik <subrata.banik@intel.com> | 2017-11-07 16:10:05 +0530 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2017-11-11 18:19:15 +0000 |
commit | 6c4b5916fcd4844410a709320ab7bf5a06a45596 (patch) | |
tree | 27874455b3a10d43d478eca05fa8fecb35716842 /src/soc/intel/common/block/spi/Makefile.inc | |
parent | f79b636088d36f1a6ac58f02e58ad8561899bb31 (diff) |
soc/intel/common/block: Add Intel common SPI support
SOC need to select specific macros need to compile
common SPI code.
Change-Id: I82f7d1852d12ca37f386b64a613a676753da959c
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/22360
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block/spi/Makefile.inc')
-rw-r--r-- | src/soc/intel/common/block/spi/Makefile.inc | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/spi/Makefile.inc b/src/soc/intel/common/block/spi/Makefile.inc new file mode 100644 index 0000000000..1ac4c2175b --- /dev/null +++ b/src/soc/intel/common/block/spi/Makefile.inc @@ -0,0 +1,13 @@ +ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK_SPI),y) +bootblock-y += spi.c + +verstage-y += spi.c + +romstage-y += spi.c + +ramstage-y += spi.c + +postcar-y += spi.c + +smm-$(CONFIG_SPI_FLASH_SMM) += spi.c +endif |