From 6c4b5916fcd4844410a709320ab7bf5a06a45596 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Tue, 7 Nov 2017 16:10:05 +0530 Subject: soc/intel/common/block: Add Intel common SPI support SOC need to select specific macros need to compile common SPI code. Change-Id: I82f7d1852d12ca37f386b64a613a676753da959c Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/22360 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh Reviewed-by: Aaron Durbin --- src/soc/intel/common/block/spi/Makefile.inc | 13 +++++++++++++ 1 file changed, 13 insertions(+) create mode 100644 src/soc/intel/common/block/spi/Makefile.inc (limited to 'src/soc/intel/common/block/spi/Makefile.inc') diff --git a/src/soc/intel/common/block/spi/Makefile.inc b/src/soc/intel/common/block/spi/Makefile.inc new file mode 100644 index 0000000000..1ac4c2175b --- /dev/null +++ b/src/soc/intel/common/block/spi/Makefile.inc @@ -0,0 +1,13 @@ +ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK_SPI),y) +bootblock-y += spi.c + +verstage-y += spi.c + +romstage-y += spi.c + +ramstage-y += spi.c + +postcar-y += spi.c + +smm-$(CONFIG_SPI_FLASH_SMM) += spi.c +endif -- cgit v1.2.3