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authorLijian Zhao <lijian.zhao@intel.com>2017-09-14 14:51:12 -0700
committerAaron Durbin <adurbin@chromium.org>2017-10-03 20:23:41 +0000
commitf0eb99996d0baa7b0c09027f542a17d01c570a47 (patch)
tree747c6997e32e55677bc6c8e9a4007419f6724120 /src/soc/intel/common/block/smm
parenta515849259f71eb92d5465b6bcd9957b73db1889 (diff)
soc/intel/cannonlake: Fill the SMI usage
Add SMM support for Cannonlake on top of common SMM, also include the SMM relocate support. Change-Id: I9aab141c528709b30804d327804c4031c59fcfff Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/21543 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block/smm')
-rw-r--r--src/soc/intel/common/block/smm/smitraphandler.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/smm/smitraphandler.c b/src/soc/intel/common/block/smm/smitraphandler.c
index 4a51cdebfc..bfa984651e 100644
--- a/src/soc/intel/common/block/smm/smitraphandler.c
+++ b/src/soc/intel/common/block/smm/smitraphandler.c
@@ -75,6 +75,8 @@ void smihandler_southbridge_monitor(
u32 data, mask = 0;
u8 trap_sts;
int i;
+ global_nvs_t *gnvs = smm_get_gnvs();
+
/* TRSR - Trap Status Register */
trap_sts = pcr_read8(PID_PSTH, PCR_PSTH_TRPST);
/* Clear trap(s) in TRSR */