diff options
| author | Rizwan Qureshi <rizwan.qureshi@intel.com> | 2018-08-09 18:10:24 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-09-06 10:28:19 +0000 |
| commit | 55597ff2799d0028179f0ce84a5c9cfec4971194 (patch) | |
| tree | 5f14409f142fc193746edbe2e59bd75c934ab5d9 /src/soc/intel/common/block/rtc | |
| parent | adfaea5400248a5f729cf29d5bbdaa6d199f1c23 (diff) | |
soc/intel/common: Add function to set BILD bit in RTC
Add a function to set the Bios Interface Lock Down bit (bit 31)
in RTC Configuration register (0x3400). This bit when set prevents
the top swap enable bit (bit 0) in the RTC BUC register (0x3414)
from being changed.
Change-Id: Iacaeeb0d6cabcf0c2c46a58948457ab832351476
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/28057
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block/rtc')
| -rw-r--r-- | src/soc/intel/common/block/rtc/rtc.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/src/soc/intel/common/block/rtc/rtc.c b/src/soc/intel/common/block/rtc/rtc.c index b8c8849d10..bfa11bd177 100644 --- a/src/soc/intel/common/block/rtc/rtc.c +++ b/src/soc/intel/common/block/rtc/rtc.c @@ -24,10 +24,10 @@ #define PCR_RTC_CONF_UCMOS_EN (1 << 2) #define PCR_RTC_CONF_LCMOS_LOCK (1 << 3) #define PCR_RTC_CONF_UCMOS_LOCK (1 << 4) -#define PCR_RTC_CONF_RESERVED (1 << 31) +#define PCR_RTC_CONF_BILD (1 << 31) /* RTC backed up control register */ #define PCR_RTC_BUC 0x3414 -#define PCR_RTC_BUC_TOP_SWAP (1 << 0) +#define PCR_RTC_BUC_TOP_SWAP (1 << 0) void enable_rtc_upper_bank(void) { @@ -48,6 +48,12 @@ void rtc_init(void) cmos_init(soc_get_rtc_failed()); } +void rtc_conf_set_bios_interface_lockdown(void) +{ + pcr_rmw32(PID_RTC, PCR_RTC_CONF, ~PCR_RTC_CONF_BILD, + PCR_RTC_CONF_BILD); +} + #if IS_ENABLED(CONFIG_INTEL_HAS_TOP_SWAP) void configure_rtc_buc_top_swap(enum ts_config ts_state) { |