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authorVarun Joshi <varun.joshi@intel.corp-partner.google.com>2020-03-17 22:52:56 -0700
committerMartin Roth <martinroth@google.com>2020-04-13 20:24:59 +0000
commit06684979f9ebfa2731bc01a5b9cfb61a4e91a2c0 (patch)
tree5bb553f9abee198e08b6bba6d5bdacd2af7efcf0 /src/soc/intel/common/block/rtc/rtc.c
parent3639f3817126a04a8cede1b92294b67574b25e18 (diff)
mb/google/deltaur: Update onboard memory config
Update dq, dqs map based on deltan schematics. Configure memory to read SPD. BUG=b:151702387 Signed-off-by: Varun Joshi <varun.joshi@intel.corp-partner.google.com> Change-Id: I29059f09dd08c81b5ca5fe1215f33871835703fe Reviewed-on: https://review.coreboot.org/c/coreboot/+/39848 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block/rtc/rtc.c')
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