diff options
author | Nico Huber <nico.h@gmx.de> | 2022-08-06 19:11:55 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-09-15 13:07:11 +0000 |
commit | 576861994ea5011c3a836a826b8189ef79c366cb (patch) | |
tree | 1d5dc30e477587ce2188d1472804322929659dcf /src/soc/intel/common/block/power_limit | |
parent | c0fc38eed8f407d71f714f4d6fe2af0c3501ece4 (diff) |
soc/intel/skylake: Assign device ops in chipset devicetree
Some PCI IDs were missing, and at least one (SPT's fast SPI
device in a generic SPI driver) was wrong. Hence, this patch
actually changes behavior depending on the devices actually
present in a machine.
In this patch the Skylake devicetree is written in a single-line
style. Alternative, the device operations could be put on a separate
line, e.g.
device pci 00.0 alias system_agent on
ops systemagent_ops
end
Tested on Kontron/bSL6. Notable in the log diff is that the
CSE and SATA drivers are hooked up now.
Change-Id: I8635fc53ca617b029d6fe1845eaef6c5c749db82
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66485
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/common/block/power_limit')
0 files changed, 0 insertions, 0 deletions