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authorLean Sheng Tan <lean.sheng.tan@intel.com>2021-06-16 01:32:22 -0700
committerWerner Zeh <werner.zeh@siemens.com>2021-06-30 07:34:44 +0000
commit508dc163f183f99f4683365ef3a6443658979846 (patch)
tree6dfa0d6bebb5ca26d96a9af547db8d9a5243b68f /src/soc/intel/common/block/pmc/Kconfig
parentf1ade489c85c95c572ef907bdb3b7f4835c1a9c7 (diff)
soc/intel/common: Move PMC EPOC related code to Intel common code
Move PMC EPOC related code to intel/common/block because it is generic for most Intel platforms and ADL, TGL & EHL use it. Add a kconfig 'PMC_EPOC' to guard this common EPOC code. The PMC EPOC register indicates which external crystal oscillator is connected to the PCH. This frequency is important for determining the IP clock of internal PCH devices. Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com> Change-Id: Ib5fd3c4a648964678ee40ed0f60ca10fe7953f56 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55565 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block/pmc/Kconfig')
-rw-r--r--src/soc/intel/common/block/pmc/Kconfig6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/pmc/Kconfig b/src/soc/intel/common/block/pmc/Kconfig
index 8cd26350b7..503e465530 100644
--- a/src/soc/intel/common/block/pmc/Kconfig
+++ b/src/soc/intel/common/block/pmc/Kconfig
@@ -19,6 +19,12 @@ config SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE
Select this on platforms where the PMC device is discoverable
when scanning busses.
+config PMC_EPOC
+ bool
+ help
+ Enable this for PMC devices to perform EPOC (CPU Early Power-on
+ Configuration) related functions.
+
endif # SOC_INTEL_COMMON_BLOCK_PMC
config PMC_INVALID_READ_AFTER_WRITE