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author | Patrick Rudolph <siro@das-labor.org> | 2019-02-23 18:24:35 +0100 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-02-25 11:21:53 +0000 |
commit | bacd57dfaf7b4c5d3bc5400dbd82b896d0ed23cc (patch) | |
tree | c75302cc41b98fc5287dbd3d0d7e9e913e558eca /src/soc/intel/common/block/pcie | |
parent | 749fe1eef9b8ed579670e0364fdb17723a7b3468 (diff) |
cpu/x86/smm: Add qemu's SMM-Revision Level
The SMI handler on qemu returned early, due to missing SMM-Revision
Level support.
Add the ID qemu uses, which is AMD64 compatible for qemu-system-x86_64.
Fixes booting tianocore payload with SMM variable store on qemu.
Change-Id: I978b94150cfc49a39c2a0818eb14a649850e451d
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/31594
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc/intel/common/block/pcie')
0 files changed, 0 insertions, 0 deletions